PXIE datasheet

【实例简介】
PXIE datasheet,总线软硬件的技术协议
PX/ Express Hardware Specification Revision History This section is an overview of the revision history of the pXi express hardware specification Revision 1.0, August 22, 2005 This is the first public revision of the PXi Express specification C PX Systems A∥ance PX/ EXpress Hardware specification Rev. 1.008/22/2005 This Page Intentionally Left Blank Contents 1. ntroduction 1.1 Objectives....................,… 1.2 13 1. 3 Background and Terminology.... 13 1. 4 Applicable documents 14 1.5 Useful Web sites 14 2. PXI Express Architecture Overview 2.1 Mechanical Architecture Overview 2.1. 1 Module and Slot Types 2.1.1. 1 3U and 6U PXI Express System Module and Slot .........17 2.1.1.2 3U and 6U PXI Express Peripheral module and slot 2.1.1.3 3Uand6 U PXI Express Hybrid Peripheral slot…… 23 2.1.1.4 3U and 6U PXI Express System Timing Module and slot.... 2.1.1.5 PXI-I Slot 2.1.1.6 3U and 6U Hybrid Slot Compatible PXI-l Peripheral Module 8 2.1.2 System Slot and System Timing Module location.……….29 2.1.3 Additional mechanical Features 30 2.1.4 Interoperability with CompactPCI Express 2.1.5 Typical System Components 2.1.6 Chassis supporting stacking3 U Modules in a6 U Slot.……… 31 2.2 Electrical architecture overview 32 2.2. 1 Features Leveraged from CompactPCI Express 33 2.2.2 Features Leveraged from the PXI Hardware Specification... 2.2.3 New Instrumentation features 2.2.3.1 High- Frequency System Reference Clock…… ∴36 2.2.3.2 Differential Synchronization Signal.... 36 2.2.3.3 Differential Triggers…....… .37 2.2.3.4 System timing module……….…., 2. 2.4 Slot Identification 37 2.2.4.1 Module drivers and the ga pins.........................37 2.24.2 Determining the Chassis Number 2. 2. 5 Controller Identification 38 2. 2. 6 Chassis Identification 38 2.2.7 Power requirements 2.3 Software Architecture Overview. ....................................................................................................38 3. Mechanical Requirements 3.1 Drawing standard 41 3.2 Dimensional Units 3.3 Chassis Subrack Mechanical Requirements 41 3.4 Minimum Slot Requirements to be a PXI Express Chassis. 35上 eatures leveraged from pⅩl-l:PⅩ I Hardware Specification………… 41 3.5.1 Maximum Number of slots 41 3.5.2 System Slot Location and Rules..... 41 3.5.3 Slot Numbering and Orientation.…… 3.5.4 PXI-I Slot 3.5.5HybridSlot-CompatiblePXI-1PeripheralModules…143 3.6 Features Leveraged from CompactPCI Express Specification 3.6.1 Module Connector Requirements .43 3.6.1.1 Advanced Differential Fabric (ADF) Connector 43 3.6.1.2 Enriched Hard-Metric (eHM) Connector 3.6.1.3 Universal power(UPM) Connector.…… 43 PX/ EXpress Hardware Specification Rev. 1.008/22/2005 www.pxisa.org Contents 3.6.2 Backplane Connector Requirements 43 3.6.2.1 Advanced Differential Fabric(ADF) Connector.……….143 3.6.2.2 Enriched Hard-Metric(eHM)Connector 3.6.2.3 Universal Power (UPM) Connector...... 43 3.6.3 3U and 6U Module requirements 3.6.3.1 System module 3.6.3.2 PXI EXpress Peripheral Module 3.6.4 Backplane Requirements 3.6.4.1 Sⅴ stem slot.… …………146 3.6.4.2 Peripheral slot… 3.64.3 PXI Express Hybrid Peripheral slot 47 3.7 New Module and Slot Types.…………… 48 3.7 PXI Express System Timing Module requirements 48 3.7.2 Backplane Requirements for New Slot Types 3.7.2.1 PXI Express System Timing Slot requirements 1, 50 3.8 Requirements for Stacking 3U Modules in 6U Slots..... 3.9 PXI LOgO 3.10 Chassis with Built-In System Modules 3. 11 Cooling Requirements 3. 11. 1 Module Cooling Requirements.... 56 3.11.2 Chassis Cooling Requirements .56 3. 12 Environmental Specifications 3. 12. 1 Temperature Specifications... …57 3.12.2 Humidity Specifications 5 3.12.3 ibration Specifications……….….….….….….….….…..5 3. 12.4 Acoustic Noise Specifications 57 3.13 PXI Express Compatibility Glyphs 57 3.13.1 Module glyphs……….….….….….……57 3. 13.2 Chassis Slot Glyphs 58 4. Electrical Requirements 4.1 PCI SIgnal!....……… 59 4. 1. 1 Hybrid Slot requirements 4.1.2 PXI-I Slot Requirements....... 59 4.2 CPCI Express Signals 59 4.2.1 System Module/Slot Requirements 4.2.2 PXI Express Peripheral Module/Slot Requirements 4.2.3 System Timing Module/Slot Requirements. 62 4.2.4 Hybrid Slot Requirements 63 4.3 PXI-l Instrumentation Signals. 64 4.3.1 Reference Clock: PXI CLK10 4.32 Trigger Bus………… ········ 64 4.3.3 Star T ······t 65 43.4 Local bus 65 4.4 PXI Express Timing References 4.4.1 Backplane Requirements…… .66 4.4.1.1 PXIe CLK100........ 66 4.4.1.2 PXI CLKIO 4.4.1.3 PXIe sYnc100 ·;····4····“··········:·;······ 和和未 67 4.4.1.4 Timing, Switching and PXIe SYNC CTRL... 4.4.2 System Timing Module requirements .71 4.4.3 Peripheral Module Requirements……… 71 4.4.3.1 PXIe clK100. 71 PX/ EXpress Hard ware Specification Rev. 1.008/22/2005 www.px/sa.org Contents 4.4.3.2 PXI CLKIO 72 4.4.3.3 PXIe SYnc100 72 4.5 Differential Triggers 74 4.5. 1 Chassis requirements 74 4.5.2 PXIe Peripheral module/ slot requirements 75 4.5.2. PXIe dstara 75 4.5.2.2 PXIe dstarb. .......................... 76 4.5.2.3 PXIe stare 76 4.5.3 System Timing Module/Slot requirements.............77 4.5.3.1 PXIE dstara 77 4.5.3.2 PXIe dstarB 77 4.5.3.3 PXIe stare .78 4.6 Slot identification 78 4.7 Backplane identification 78 4.8 SMBus Address reservation 79 4.9 Electrical Guidelines for 6U 4.9.1 6U Chassis that Support Stacking 3U Modules .80 4.10 Connector Pin Assignments 4.10.1 PXI Express Peripheral Slots and Modules.. 830 4.10.2 PXI Express SysteIn Slot and Modules 4.10.2.I 4 Link Configuration 81 4.10.2. 2 2 Link Configuration 82 4.10.3 PXI Express Hybrid Peripheral Slot. 4.10.4 PXL-1 Slot ..83 4.10.5 System Timing Slot .84 4.11 POWER 84 4.11.1 Power Requirements from CompactPCI Express 85 4.11.2 Chassis requirements………… 85 4.11.2.1 Minimum Required Continuous Current……………….285 4. 11.2.2 Low-Power Chassis Power Supply Specifications 4.11.3 Module requirements 87 4.11.3 Maximum Continuous Current draw ……88 4.12 Chassis grounding….… 5. Regulatory Requirements 5.1 Requirements for EMC.....89 5.2 Requirements for Electrical Safety...... 89 5.3 Additional Requirements for Chassis 89 6. PXI Express Software Specification compliance Figures Figure 1-1. PXI Express Hardware Specification Architectures Figure 1-2. PXI Express Software Specification Architecture Figure2-1.3 U PXI Express System Module……… Figure 2-2. 6U PXI Express System Module. 22889 Figure 2-3. 3U PXI Express System Slot Figure 2-4. 6U PXI Express System Slot Figure2-5.3 U PXI Express Peripheral Module…….….… ‘‘······ 21 Figure 2-6. 6U PXI Express Peripheral Module..... 21 Figure 2-7. 3U PXI Express Peripheral Slot Figure 2-8. 6U PXI Express Peripheral Slot 23 Figure 2-9. 3U PXI Express Hybrid Peripheral Slot 24 C PX Systems Alliance PX/ Express Hardware Specification Rev. 1.008/22/2005 Contents gure 2-10. 6U PXI Express Hybrid Peripheral Slot F1 25 igure 2-11. 6U PXI Express System Timing Module ··· 26 Figure 2-12. 3U PXI Express System Timing Slot 27 Figure 2-13. 6U PXI Express System Timing Slot Figure 2-14. 6U PXI Express System Timing Slot with Stacked 3U Support Figure 2-15. 3U Hybrid Peripheral Slot Compatible PXI-1 Module Figure 2-16. 6U Hybrid Peripheral Slot Compatible PXl-1 Module..... 29 Figure 2-17. Typical System Components 31 Figure 2-18. Example of a PXI Express Chassis that Supports 3U Stacking Figure 2-19. Instrumentation Signal Implementation Exanple 35 Figure 2-20. Instrumentation Signals Connector Mapping 36 Figure 3 6U PXI Express Peripheral Module PcB 45 Figure 3-2. 6U PXI Express Peripheral Module Igure 3-3 Fi 6U PXI Express Peripheral slot Figure 3-4. 6U PXI Express hybrid Slot 48 Figure 3-5. 3U PXI Express System Timing Module PCB Figure 3-6. 6U PXI Express System Timing Module PcB ……………50 Figure 3-7. 3U PXI Express System Timing Slot Backplane Dimensions Figure3-8.6 J PXI Express System Timing Slot Backplane Dimensions………….52 Figure 3-9. 6U PXI Express System Timing Slot with Stacked Support Backplane Dimensions ......53 Figure 3-10. PXI LogO Figure3-11. PXI Express Logo…… .55 Figure 3-12. Cooling Airflow Direction in a PXI Express System ... 56 Figure 3-13. Module Glyphs 5 Figure3-14. Slot Glyphs……….… 58 Figure 4-1 PXI Trigger Bus Termination Figure 4-2. Timing relationship of PxI clk10 to PXIe_ClK100 Figure 4-3. Timing Relationship of PXle syncio0 to PXlclK10 and pXle_ clk1o0........68 Figure 4-4. PXIe_sYNc100 Default Behavior ·····+·; 69 Figure45.PXle_ SYNCI00at3.33 MHz USing pxle syno_ CTRL as restart………….....170 Figure 4-6. PXIe_ sYNClo0 Using PXIe_ sYNC_ctrl as enable Figure 4-7. Timing Relationship between SYNC_CTRL and PXI_CLK10 71 Figure 4-8. Peripheral Module Circuit for Terminating PXle_clK100 Signal..... Figure 4-9. Peripheral Module Circuit for Terminating pxle sync100 circuit 73 Figure4-10. Circuit to recreate PXI CLKI0 Internally as MyCLK10…….………73 Figure 4-11. Peripheral Module Circuit for Terminating PXle_ dstara 76 Figure 4-12. Text Required for Low-Power Chassis 87 Tables Table 2-1. PXI Express and CompactPCI Express Specification Names Table 2-2. PXI and PXI Express Module Interoperability Table 3-1. Upper and Lower 3U Slot Implementation Table 4-1. System Module and Slot Requirements …59 Table 4-2. PXI Express Peripheral Module and Slot requirements 61 Table 4-3. System Timing Module and Slot Requirements 62 Table44. Hybrid Slot Requirements…… 63 Table 4-5. Timing relationship of PXI ClK10 to PXle ClK100 Table 4-6. Timing Relationship of PXle_sYNC100 to PXI_CLK10 and PXle_ClK100 .69 Table 4-7. Timing Relationship between SYNC_CTRL and PXI_ClK10 71 Table 4-8. PXle_ dSTAR Set Mapping ....74 Table 4-9. PXI Express Peripheral Slot and Module Pin Assignments 80 Table 4-10. Pin Assignments for 4 Link Operation 81 Table 4-11. Pin Assignments for 2 Link Operation PX/ EXpress Hard ware Specification Rev. 1.008/22/2005 www.px/sa.org Contents Table 4-12. Hybrid Peripheral Slot Pin Assignments 83 Table 4-13. PXI Express System Timing Slot/Module Pinout 84 Table4-14.PⅪ I Express Chassis Minimum Required Continuous Current………,85 Table 4-15. PXI Express Backplane Continuous Current Capability ..........87 C PX Systems Allal PX/ Express Hardware Specification Rev. 1.008/22/2005 This Page Intentionally Left Blank 【实例截图】
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