实例介绍
【实例简介】
VITA_42_0_Standard_for_XMC.pdf
ANSIMITA 42.0-2008 Working Group The following people contributed to the development of this standard. Their participation is appreciated Ray Alderman VITA Observer Randy banton Mercury Computer Systems, Inc Participant Steve Belvin SBi Participan Lee Brown Dy 4 Systems Inc Participant Gorky Chin VISTA Contro s Corporation Observer Danny Cohen Sun Mie Participant Dick Debock Thales Computers Participant Paul dozier TEK Microsystems Editor Chris eckert SBS Technologies, Inc Participant Barry easten R adstone Participant Michael france Artesyn Communication Products Participant Jeff harris Motorola computer group Observer John hill Sun Microsystems Participant Timothy Ho Motorola semiconductor Product Sector Participant Frank Hom APW Electronic Soluti Participant Aaron raiway Spectrum Signal Processing Participant Tony Lavely Mercury Computer Syslems, Inc. Sponsor Mike Macpherson MITRE Corporation Sponsor Joc norris Technobox. Inc. Participant Bill Northey FCI Electronics Participant Gregory Novak Motorola Computer Group Sponsor / chair Elwood Parsons Foxconn Electronics Sponsor Bob Patterson yco Electronics Participant David Pepper VMIC, A GE Fanuc Company Participant Robert Persons Motorola Computer Group Participan Andrew Reddig TEK Microsystems Sponsor /Chair Mac rush Motorola Computer Group Participant John Rynearson VIT Participant Mark schell FCI Electronics Observer H Schubert MEN Mikro Electronik GMBH Participant Ivan Straznicky Dy 4 Systems Inc Participant Bob sullivan Hybricon Corporation Partici pant Bruce Thomas VISTA Contro s Corporation Participant Larry thompson NAVSEA Crane Division Observer Robert tufford Motorola Computer Group Participant Frank ft Spectrum Signal Processing Participan Randy White Dy 4 Systems Inc Participant Henry Wong Motorola Computer Group Participant Comments, Corrections, or Additions Cutiments, corrections, ur additions to this propused standard imlay be forwarded to Technical director VITA PO BOx 19658 Fountain hills, AZ 85269 Ph;480-837-7486 Emailtechdir@vita.com VsO and other standards Information about other standards being developed by VsO as well as Product Directories, VME Handbooks, and general information about the embedded market is available from the VITa office listed on the front cover Copyright 2008 VITA Page 3 of 42 ANSIMITA 42.0-2008 1.0 Introduction ww 1.1。 bjective,,,...,.,..,,… 777 1.2 XMC Overview 1.3 Terminology.……,…,…,…,…,…,,…,…,…,…,…,…,……,……,8 3.1Ⅹ MC Definitions. 3. 2 Specification Key Words 1.4 References……n 9 1.5 Dimensions mmmmmmmmmm.10 2.0c。 appliance…,,,,,,,,,11 3.0 Mezzanine Cards 12 3.1 Overview 日翻■面画国国虚■面日面量量■面面日面 2 3.2 Single-Width Mezzanine Cards 14 3.3 Double-Width Mezzanine Cards 16 3.4 Populating Optional PMC Connector Areas.....,.,...... 17 3.5 Populating Optional XMC Connector Areas 17 3.6 Conduction Cooling………….…,………,…………18 40 Carrier Board. mwm..mm.. 19 4.1 vervet,……aaa…aa 国国丽丽日日看 19 4.2 Connector Configurations…….….….…………………22 4.3 Populating Optional PMC Connector Areas…………,.…….….22 44 Populating Optional XMC Connector Areas…… 国■■■■■■■■着国E■面口口口口■重国■昌 22 5.0 XMC Connecto『…25 5.1 Pin Definitions for Primary XMC Connectors...... 25 Copyright 2008 VITA Page 4 of 42 ANSIMITA 42.0-2008 5.2 Pin Definitions for Secondary XMC Connectors... 28 5.2.1 Fabric Mode Pin Usage for XMC Secondary Connectors 28 5.2.2 User I /O Mode Pin Usage for XMC Secondary Connectors. .............28 5.3 JTAG Signals .29 5.4 PMI Support…,…,…,…,…,…,…,…,…,…,…,…,…,……….30 5.5 Connector Pads and Labeling................. 30 56 Connector Assembly……,..,.,,…,…,…….,….,………31 5.7 Signal Routing and Electrical BRSBEBEBBBEEIBEBB 31 5.8 Power Consumption and Heat Dissipation.,…,…,…32 5.8.1 Carrier Voltage......,..,.,,……………32 5.8.2 Power Sequencing..…,…,……3 6.0 dentification aaaa_日日日日a 34 6.1 Labels 34 6.2 Label Locations 6.3 dentification block 34 70 Compatibility Issues,……,, 36 7. 1 Mechanical Interoperability 36 7.2 Electrical Interoperability……,.. ■■国■m国■■日日重■■面■口■D■ 36 73 System Interoperability………………,…,…,,…,…,……36 Copyright 2008 VITA Page 5 of 42 ANSIMITA 42.0-2008 Appendix A Recommendations for Protocol Layer Standards. 37 Appendix B ldentification Block Identifiers and Parameters for PMC Connectors 38 Appendix C Connector Pin Usage on P25 for Double-Width Cards 39 Appendix D IPMI Serial EEPROM FRU Information ........ 40 D 1 Addressing 40 D2 Devices… 40 D 3 FRU Data 40 Copyright 2008 VITA Page 6 of 42 ANSIMITA 42.0-2008 1.0 Introduction The inherent limits of bus architectures have sparked wide-spread interest in switched interconnect technologies such as RapidIo and pCI Express, whose many high-speed point-to-point connections deliver high aggregate bandwidths on a flattened architecture, utilizing fewer pins and operating over greater transmission distances n light of these advantages, this document proposes to expand the potential fcatures of Common mezzanine Cards(cmc)by defining a standard by which switched interconnect Technologies can be integrated into these cards 1.1 Objective This specification defines an open standard for supporting high-speed, switched interconnect protocols on an existing, widely deployed form factor. In light of this abjective, specific goals include supporting A high-speed switched interconnect Open standardized technologics for switched fabrics Standard pmc form factors CoMpatibility with existing PMc specifications PMC. XMC, or dual-mode mezzanine cards PMC. XMC, or dual-mode carriers Standard VME, CompactPCI, Advanced TCA, and PCi Express carriers Standard pmc stacking heights Optional conduction cooling In support of these goals, this document specifies the mechanical and generic electrical requirements necessary to serve as a basis for any number of protocol layer standards built on and complying with this standard. Protocol layer standards should follow the recommendations in Appendix A 1.2 XMC Overview The XMC Mezzanine Card base standard defines physical features that enable switched communications between a standard mezzanine card and its carrier. These features include the addition of one or more connectors carrying the additional electrical signals necessary for such communications In addition to providing signals to carry data to and from the carrier module, these high speed connectors provide adequate power, ground and auxiliary signals so that the mezzanine card can function without signals from any standard PMC connectors, thus making PMC connectors optional. This specification requires no changes to existing PMC connectors, allowing them to continue supporting PCl-32 and PCI-64 protocol ayers Copyright 2008 VITA 7of42 ANSIMITA 42.0-2008 1.3 Terminology 1.3.1 XMC Definitions XMC An evolution of the pmc mezzanine card that includes a new connector and the electrical signals necessary for switched communications between the mezzanine card and its carrier Carrier Board. A PCB that complies with the IEEE 1386- Standard for a Common Mczzaninc Card Family and has an XMC-compliant primary connector Mezzanine card. a PCb that attaches to a Carrier board and has an XMc-compliant primary connector. PMC Connectors. Any connectors implemented on an XMC Carrier Board or Mezzanine card defined by ieee 1386.1-2001-Standard Physical and environmental Layers for PCI Mezzanine Cards On mezzanine cards, PMC connectors occupy locations Pnl through Pn4 XMC Connectors. Connectors implemented on an XMC Carrier Board or Mezzanine Card defined by this sTandard and subordinate protocol layer standards as opposed to IEEE 1386. 1-2001-Standard Physical and Environmental Layers for PCI Mezzanine Cards On mezzanine cards, XMC connectors occupy locations Pn5 and pn6 Primary Connector. An XMC connector implemented on an XMC Carrier Board or Mezzanine card that carries auxiliary signals, voltage signals, and differential data signals between the carrier and mezzanine card On Mezzanine Cards, the primary connector occupies connector location P15. General pin assignments for the primary connector are provided in this specification, while detailed signal assignments are documented in subsidiary protocol specifications Secondary connector. Any XMC connector implemented on an XMC Carrier Board other than the primary connector. Secondary connectors do not carry auxiliary signals but Imlay carry difFerenTial data signals ur user IO signals. General pin assignments for the secondary connector are provided in this specification, while detailed signal assignments are documented in subsidiary protocol specifications 1.3.2 Specification Key words May. The word"may indicates an optional feature with no implied preference RFU (Reserved for Future Use by this Standard). Use of anything marked RFU is prohibited in current designs and may impair compatibility with future revisions of this standard Copyright 2008 VITA Page 8 of 42 ANSIMITA 42.0-2008 RPS(Reserved for Use by protocol Standards). Use of anything marked rhs may impair compatibility with protocol layer standards built on or complying with this standard. If a specific protocol layer standard does not explicitly define the use of a pin marked rPs that pin may be used as a User Defined (LD) pin and still remain compliant with that protocol standard Shall. The word"shall indicates a mandatory requirement Should. The wordshould' indicates a feature which is not mandatory but is strongly encourage UD(User Defined). Implementation of anything marked UD will never be specified by this standard and any protocol layer standard built on or complying with this standard 1. 4 References The following publications are used in conjunction with this standard. When any of the referenced specifications are superseded by an approved revision, that revision shall apply IEEE 1386-2001 Standard for a Common Mezzanine Card Family (http:/standards.ieee.org IEEE 1386, 1-2001 Standard Physical and Environmental Layers for PCI Mezzanine Cards(http://standards.ieceorg IEEE 1149. 1-2001 Standard Test Access Port and Boundary-Scan Architecture (http://standards.ieee.org ANSI/VITA 32-2003 Processor Pmc standard for Processor PCi mezzanine cards (http:/www.vita.com ANSIVITA 39-2003 PCI-X Auxiliary Standard for PMCs and Processor PMCs (http://www.vita.com) ANSI/VITA 20-2001(R2005)Conduction Cooled PCI Mezzanine Card(CCPMC) Chttp:/www.vita.com) Vita42.10-200xXmcGeneralPurposeI/oStandard(xmc.10)(http://www.vita.com ANSI/TIA/EIA-644-A-2001 Electrical Characteristics of Low Voltage Differential Signaling(lvds)InterfaceCircuits(http:/www.ansi.org PicMg2,9rl.oCompactpciSystemManagement(http://www.picg,org Copyright 2008 VITA Page 9 of 42 ANSIMITA 42.0-2008 Platform Management Ficld Replaceable Unit (FRU Information Storage Definition (ISD)V2.0(Intel Corporation, Hewlett-Packard Company, NEC Corporation, Dell ComputerCorporationhttp://developerintel.com/design/servers/ipmi) Phillips Semiconductors I2C -Bus Specification 2. 1 (http://www.semiconductors.philips.com 1.5 Dimensions This standard follows the mcchanical and dimensional spccifications givcn in IEEE 1386 except where noted All dimensions are expressed in millimeters Copyright 2008 VITA Page 10 of 42 【实例截图】
【核心代码】
VITA_42_0_Standard_for_XMC.pdf
ANSIMITA 42.0-2008 Working Group The following people contributed to the development of this standard. Their participation is appreciated Ray Alderman VITA Observer Randy banton Mercury Computer Systems, Inc Participant Steve Belvin SBi Participan Lee Brown Dy 4 Systems Inc Participant Gorky Chin VISTA Contro s Corporation Observer Danny Cohen Sun Mie Participant Dick Debock Thales Computers Participant Paul dozier TEK Microsystems Editor Chris eckert SBS Technologies, Inc Participant Barry easten R adstone Participant Michael france Artesyn Communication Products Participant Jeff harris Motorola computer group Observer John hill Sun Microsystems Participant Timothy Ho Motorola semiconductor Product Sector Participant Frank Hom APW Electronic Soluti Participant Aaron raiway Spectrum Signal Processing Participant Tony Lavely Mercury Computer Syslems, Inc. Sponsor Mike Macpherson MITRE Corporation Sponsor Joc norris Technobox. Inc. Participant Bill Northey FCI Electronics Participant Gregory Novak Motorola Computer Group Sponsor / chair Elwood Parsons Foxconn Electronics Sponsor Bob Patterson yco Electronics Participant David Pepper VMIC, A GE Fanuc Company Participant Robert Persons Motorola Computer Group Participan Andrew Reddig TEK Microsystems Sponsor /Chair Mac rush Motorola Computer Group Participant John Rynearson VIT Participant Mark schell FCI Electronics Observer H Schubert MEN Mikro Electronik GMBH Participant Ivan Straznicky Dy 4 Systems Inc Participant Bob sullivan Hybricon Corporation Partici pant Bruce Thomas VISTA Contro s Corporation Participant Larry thompson NAVSEA Crane Division Observer Robert tufford Motorola Computer Group Participant Frank ft Spectrum Signal Processing Participan Randy White Dy 4 Systems Inc Participant Henry Wong Motorola Computer Group Participant Comments, Corrections, or Additions Cutiments, corrections, ur additions to this propused standard imlay be forwarded to Technical director VITA PO BOx 19658 Fountain hills, AZ 85269 Ph;480-837-7486 Emailtechdir@vita.com VsO and other standards Information about other standards being developed by VsO as well as Product Directories, VME Handbooks, and general information about the embedded market is available from the VITa office listed on the front cover Copyright 2008 VITA Page 3 of 42 ANSIMITA 42.0-2008 1.0 Introduction ww 1.1。 bjective,,,...,.,..,,… 777 1.2 XMC Overview 1.3 Terminology.……,…,…,…,…,…,,…,…,…,…,…,…,……,……,8 3.1Ⅹ MC Definitions. 3. 2 Specification Key Words 1.4 References……n 9 1.5 Dimensions mmmmmmmmmm.10 2.0c。 appliance…,,,,,,,,,11 3.0 Mezzanine Cards 12 3.1 Overview 日翻■面画国国虚■面日面量量■面面日面 2 3.2 Single-Width Mezzanine Cards 14 3.3 Double-Width Mezzanine Cards 16 3.4 Populating Optional PMC Connector Areas.....,.,...... 17 3.5 Populating Optional XMC Connector Areas 17 3.6 Conduction Cooling………….…,………,…………18 40 Carrier Board. mwm..mm.. 19 4.1 vervet,……aaa…aa 国国丽丽日日看 19 4.2 Connector Configurations…….….….…………………22 4.3 Populating Optional PMC Connector Areas…………,.…….….22 44 Populating Optional XMC Connector Areas…… 国■■■■■■■■着国E■面口口口口■重国■昌 22 5.0 XMC Connecto『…25 5.1 Pin Definitions for Primary XMC Connectors...... 25 Copyright 2008 VITA Page 4 of 42 ANSIMITA 42.0-2008 5.2 Pin Definitions for Secondary XMC Connectors... 28 5.2.1 Fabric Mode Pin Usage for XMC Secondary Connectors 28 5.2.2 User I /O Mode Pin Usage for XMC Secondary Connectors. .............28 5.3 JTAG Signals .29 5.4 PMI Support…,…,…,…,…,…,…,…,…,…,…,…,…,……….30 5.5 Connector Pads and Labeling................. 30 56 Connector Assembly……,..,.,,…,…,…….,….,………31 5.7 Signal Routing and Electrical BRSBEBEBBBEEIBEBB 31 5.8 Power Consumption and Heat Dissipation.,…,…,…32 5.8.1 Carrier Voltage......,..,.,,……………32 5.8.2 Power Sequencing..…,…,……3 6.0 dentification aaaa_日日日日a 34 6.1 Labels 34 6.2 Label Locations 6.3 dentification block 34 70 Compatibility Issues,……,, 36 7. 1 Mechanical Interoperability 36 7.2 Electrical Interoperability……,.. ■■国■m国■■日日重■■面■口■D■ 36 73 System Interoperability………………,…,…,,…,…,……36 Copyright 2008 VITA Page 5 of 42 ANSIMITA 42.0-2008 Appendix A Recommendations for Protocol Layer Standards. 37 Appendix B ldentification Block Identifiers and Parameters for PMC Connectors 38 Appendix C Connector Pin Usage on P25 for Double-Width Cards 39 Appendix D IPMI Serial EEPROM FRU Information ........ 40 D 1 Addressing 40 D2 Devices… 40 D 3 FRU Data 40 Copyright 2008 VITA Page 6 of 42 ANSIMITA 42.0-2008 1.0 Introduction The inherent limits of bus architectures have sparked wide-spread interest in switched interconnect technologies such as RapidIo and pCI Express, whose many high-speed point-to-point connections deliver high aggregate bandwidths on a flattened architecture, utilizing fewer pins and operating over greater transmission distances n light of these advantages, this document proposes to expand the potential fcatures of Common mezzanine Cards(cmc)by defining a standard by which switched interconnect Technologies can be integrated into these cards 1.1 Objective This specification defines an open standard for supporting high-speed, switched interconnect protocols on an existing, widely deployed form factor. In light of this abjective, specific goals include supporting A high-speed switched interconnect Open standardized technologics for switched fabrics Standard pmc form factors CoMpatibility with existing PMc specifications PMC. XMC, or dual-mode mezzanine cards PMC. XMC, or dual-mode carriers Standard VME, CompactPCI, Advanced TCA, and PCi Express carriers Standard pmc stacking heights Optional conduction cooling In support of these goals, this document specifies the mechanical and generic electrical requirements necessary to serve as a basis for any number of protocol layer standards built on and complying with this standard. Protocol layer standards should follow the recommendations in Appendix A 1.2 XMC Overview The XMC Mezzanine Card base standard defines physical features that enable switched communications between a standard mezzanine card and its carrier. These features include the addition of one or more connectors carrying the additional electrical signals necessary for such communications In addition to providing signals to carry data to and from the carrier module, these high speed connectors provide adequate power, ground and auxiliary signals so that the mezzanine card can function without signals from any standard PMC connectors, thus making PMC connectors optional. This specification requires no changes to existing PMC connectors, allowing them to continue supporting PCl-32 and PCI-64 protocol ayers Copyright 2008 VITA 7of42 ANSIMITA 42.0-2008 1.3 Terminology 1.3.1 XMC Definitions XMC An evolution of the pmc mezzanine card that includes a new connector and the electrical signals necessary for switched communications between the mezzanine card and its carrier Carrier Board. A PCB that complies with the IEEE 1386- Standard for a Common Mczzaninc Card Family and has an XMC-compliant primary connector Mezzanine card. a PCb that attaches to a Carrier board and has an XMc-compliant primary connector. PMC Connectors. Any connectors implemented on an XMC Carrier Board or Mezzanine card defined by ieee 1386.1-2001-Standard Physical and environmental Layers for PCI Mezzanine Cards On mezzanine cards, PMC connectors occupy locations Pnl through Pn4 XMC Connectors. Connectors implemented on an XMC Carrier Board or Mezzanine Card defined by this sTandard and subordinate protocol layer standards as opposed to IEEE 1386. 1-2001-Standard Physical and Environmental Layers for PCI Mezzanine Cards On mezzanine cards, XMC connectors occupy locations Pn5 and pn6 Primary Connector. An XMC connector implemented on an XMC Carrier Board or Mezzanine card that carries auxiliary signals, voltage signals, and differential data signals between the carrier and mezzanine card On Mezzanine Cards, the primary connector occupies connector location P15. General pin assignments for the primary connector are provided in this specification, while detailed signal assignments are documented in subsidiary protocol specifications Secondary connector. Any XMC connector implemented on an XMC Carrier Board other than the primary connector. Secondary connectors do not carry auxiliary signals but Imlay carry difFerenTial data signals ur user IO signals. General pin assignments for the secondary connector are provided in this specification, while detailed signal assignments are documented in subsidiary protocol specifications 1.3.2 Specification Key words May. The word"may indicates an optional feature with no implied preference RFU (Reserved for Future Use by this Standard). Use of anything marked RFU is prohibited in current designs and may impair compatibility with future revisions of this standard Copyright 2008 VITA Page 8 of 42 ANSIMITA 42.0-2008 RPS(Reserved for Use by protocol Standards). Use of anything marked rhs may impair compatibility with protocol layer standards built on or complying with this standard. If a specific protocol layer standard does not explicitly define the use of a pin marked rPs that pin may be used as a User Defined (LD) pin and still remain compliant with that protocol standard Shall. The word"shall indicates a mandatory requirement Should. The wordshould' indicates a feature which is not mandatory but is strongly encourage UD(User Defined). Implementation of anything marked UD will never be specified by this standard and any protocol layer standard built on or complying with this standard 1. 4 References The following publications are used in conjunction with this standard. When any of the referenced specifications are superseded by an approved revision, that revision shall apply IEEE 1386-2001 Standard for a Common Mezzanine Card Family (http:/standards.ieee.org IEEE 1386, 1-2001 Standard Physical and Environmental Layers for PCI Mezzanine Cards(http://standards.ieceorg IEEE 1149. 1-2001 Standard Test Access Port and Boundary-Scan Architecture (http://standards.ieee.org ANSI/VITA 32-2003 Processor Pmc standard for Processor PCi mezzanine cards (http:/www.vita.com ANSIVITA 39-2003 PCI-X Auxiliary Standard for PMCs and Processor PMCs (http://www.vita.com) ANSI/VITA 20-2001(R2005)Conduction Cooled PCI Mezzanine Card(CCPMC) Chttp:/www.vita.com) Vita42.10-200xXmcGeneralPurposeI/oStandard(xmc.10)(http://www.vita.com ANSI/TIA/EIA-644-A-2001 Electrical Characteristics of Low Voltage Differential Signaling(lvds)InterfaceCircuits(http:/www.ansi.org PicMg2,9rl.oCompactpciSystemManagement(http://www.picg,org Copyright 2008 VITA Page 9 of 42 ANSIMITA 42.0-2008 Platform Management Ficld Replaceable Unit (FRU Information Storage Definition (ISD)V2.0(Intel Corporation, Hewlett-Packard Company, NEC Corporation, Dell ComputerCorporationhttp://developerintel.com/design/servers/ipmi) Phillips Semiconductors I2C -Bus Specification 2. 1 (http://www.semiconductors.philips.com 1.5 Dimensions This standard follows the mcchanical and dimensional spccifications givcn in IEEE 1386 except where noted All dimensions are expressed in millimeters Copyright 2008 VITA Page 10 of 42 【实例截图】
【核心代码】
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