sepic电路分析

【实例简介】
sepic电路 使用人不是很多 不过是很有用的电路 这是一个sepic变换器工作过程分析 及参数计算
DESIGN TIPS Energy Efliciency The Long Way fror Digital Products Drive Quenching the Thirs Digital processes will The Never-Ending Quest Electric to Hybrid Power Managemen For Information shape the portable market to Electric to IC PWMCCM Subcircuit OOu.H ●0.6 Anwar Power BeeomesCool": Trends in Distributed Design by Application or pplication-Specific High Power Players are Power Management Application by Design? Power Products not Afraid of Cycles ohss- 680pF3m2 R三国 igure 8. This shows the control-to- Figure 7. Analysis can also be done with PSpice. This figure shows a specific output transfer function for the Sepic design example for a 15 W converter. Parasitic resistances are included in the converter, With low values of damping PSpice mode resistors, the converter has four poles, and three night-half-plane zeros. This PSpice Madeling of the results in an extreme phase delay of 2, 02(4+12)C02 The analytical solution above does not include all of the parasitic circuit ele- er? There are several possibilities. First, ments As you will see from there is a the dynamic and step load requirement shies Must be Intelligent The Evolutin from the Safety First As you can see from these expres prodigious amount of work to be done on the system may be very benign and Emery- Efficient sions, the"simplified"analysis is any- ven without the resistances with no reason to design a loop with ing but simple. Including the pa high bandwidth. This allows the loop sitic resistances greatly complicates We can also use PSpice to help un gain to be reduced below 0 dB before the analysis, but may be necessary derstand the Sepic better Fig. 7 shows the extreme phase delay of the second 認图 ≡■ for worst-case analysis of the Sepic the circuit model for a specific numeri- resonance. converter. The analysis of this converter cal application of the Sepic, and it in involves the use of the powerful extra cludes resistances which will affect the Secondly, in many practical cases, the element theorem, and Vorperian's book stability of the converter, sometimes in parasitic resistances of the circu 三WW on circuit analysis techniques the RhP zeros to the left half plane, greatly reducing the phase delay. This In addition to the inevitable fourth The PSpice file listing can be down- can also be done with the addition of order denominator of the Sepic, the most loaded from 4 so you can reproduce damping networks to the power stage, a important features to note in the control these results to analyze your own Sepic topic beyond the scope of this article High Power Semiconductors: Entering the Age of High-Current The Role of Power High Temperature Packaging. ng Enery Needs to Be transfer function are the terms in the converter Are They Worth the Effort? Power Modules lor Automotlve Problem or Resource Price/Performance Neutral numerator. The first term is a single right- Thirdly, some engineers do not build alf-plane(RHP)zero Right-half-plane Fig 8 shows the result of the PSpice a proper Sepic. In some application zeros are a result of converters where the analysis. The two resonant frequen notes. the two inductors are wound on response to an increased duty cycle is to cies predicted by the hand analysis can a single toroidal core, which provides initially decrease the output voltage clearly be seen in the transfer function almost unity coupling between the two plot. What is remarkable is the extreme In this case, the circuit no longer works When the power switch is turned on, amount of phase shift after the second as a proper Sepic. Don' t fall into this the first inductor is disconnected from the resonance. This is caused by the delay design trap -the circuit will be far from load, and this directly gives rise to the first- of the second pair of poles, and the optimum order RHP zero. Notice that the expres- dditional delay of the complex RHP sion only depends on the input inductor, zeros. The total phase delay through Additional Reading L1, the load resistor, R, and the duty cycle. the converter is an astonishing 630 [1Fast Analytical Techniques for degrees. Controlling this converter at a Electrical and Electronic Circuits, Filling the“ Experien A 100 Yean of power Control Power Management solution hm由 New Loek of Prwer semkenduet The complex RHP zeros arise fror frequency beyond the second reso- Vatche Vorperian, Cambridge Universi the fact that turning on the switch is impossible reSs2002.SBN0521624428. disconnects the second inductor from the load. These zeros will actually move Summary ne.com.ClickonArticlesandSepic ith the values of parasitic resistors in The Sepic converter definitely has the circuit, so careful analysis of your some select applications where it is the converter is needed to ensure stability pology of choice. How do designers under all conditions jet away with building such a convert www.riDLeyengIneering.com Power Systems Design Europe November 2006 【实例截图】
【核心代码】