ST7789V3_SPEC_Preliminary_V0.0_200102

【实例简介】ST7789V3_SPEC_Preliminary_V0.0_200102

【实例截图】

【核心代码】

LIST OF CONTENT
1 GENERAL DESCRIPTION ................................................................................................................................... 8
2 FEATURES .............................................................................................................................................................. 9
3 PAD ARRANGEMENT ........................................................................................................................................ 11
3.1 O UTPUT B UMP D IMENSION ............................................................................................................................. 11
3.2 I NPUT B UMP D IMENSION ................................................................................................................................ 12
3.3 A LIGNMENT M ARK D IMENSION ..................................................................................................................... 13
3.4 C HIP I NFORMATION ........................................................................................................................................ 13
4 PAD CENTER COORDINATES ......................................................................................................................... 15
5 BLOCK DIAGRAM ............................................................................................................................................. 28
6 PIN DESCRIPTION ............................................................................................................................................. 29
6.1 P OWER S UPPLY P INS ....................................................................................................................................... 29
6.2 I NTERFACE L OGIC P INS .................................................................................................................................. 30
6.3 D RIVER O UTPUT P INS ..................................................................................................................................... 32
6.4 T EST AND OTHER PINS .................................................................................................................................... 32
7 DRIVER ELECTRICAL CHARACTERISTICS .............................................................................................. 33
7.1 A BSOLUTE O PERATION R ANGE ....................................................................................................................... 33
7.2 DC C HARACTERISTICS ................................................................................................................................... 34
7.3 P OWER C ONSUMPTION ................................................................................................................................... 35
7.4 AC C HARACTERISTICS ................................................................................................................................... 36
7.4.1 8080 Series MCU Parallel Interface Characteristics: 9/8-bit Bus ........................................................... 36
7.4.2 Serial Interface Characteristics (3-line serial): ........................................................................................ 38
7.4.3 Serial Interface Characteristics (4-line serial): ........................................................................................ 39
7.4.4 RGB Interface Characteristics: ................................................................................................................ 40
7.4.5 Reset Timing: ............................................................................................................................................ 42
8 FUNCTION DESCRIPTION ............................................................................................................................... 44
8.1 MPU I NTERFACE T YPE S ELECTION ................................................................................................................ 44
8.2 8080 S ERIES MCU P ARALLEL I NTERFACE ...................................................................................................... 45
8.2.1 Write cycle sequence ................................................................................................................................. 45
8.2.2 Read cycle sequence ................................................................................................................................. 46
8.3 S ERIAL I NTERFACE ......................................................................................................................................... 48
8.3.1 Pin description .......................................................................................................................................... 48
8.3.2 Command write mode ............................................................................................................................... 49
8.3.3 Read function ............................................................................................................................................ 51
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8.3.4 3-line serial interface Ⅰ / Ⅱ protocol ...................................................................................................... 51
8.3.5 4-line serial protocol ................................................................................................................................. 53
8.3.6 2 data lane serial Interface ....................................................................................................................... 55
8.4 D ATA T RANSFER B REAK AND R ECOVERY ....................................................................................................... 59
8.5 D ATA T RANSFER P AUSE .................................................................................................................................. 61
8.5.1 Parallel interface pause ............................................................................................................................ 61
8.6 D ATA T RANSFER M ODE .................................................................................................................................. 61
8.6.1 Method 1 ................................................................................................................................................... 61
8.6.2 Method 2 ................................................................................................................................................... 62
8.7 D ATA C OLOR C ODING ..................................................................................................................................... 63
8.7.1 8080 series 8-bit Parallel Interface .......................................................................................................... 63
8.7.2 8-bit data bus for 12-bit/pixel (RGB 4-4-4-bit input), 4K-Colors, 3Ah=”03h”........................................ 63
8.7.3 8-bit data bus for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3Ah=”05h”...................................... 64
8.7.4 8-bit data bus for 18-bit/pixel (RGB-6-6-6-bit input), 262K-Colors, 3Ah=”06h” ................................... 65
8.7.5 8080 series 9-Bit Parallel Interface .......................................................................................................... 66
8.7.6 Write 9-bit data for RGB 5-6-5-bit input (65K-Color), 3Ah=”05h” ........................................................ 66
8.7.7 Write 9-bit data for RGB 6-6-6-bit input (262K-Color), 3Ah=”06h”, MDT [1:0]=”00b” ...................... 67
8.7.8 Write 9-bit data for RGB 6-6-6-bit input (262K-Color), 3Ah=”06h”, MDT [1:0]=”01b” ...................... 68
8.7.9 3-Line Serial Interface .............................................................................................................................. 69
8.7.10 Write data for 12-bit/pixel (RGB-4-4-4 bit input), 4K-Colors, 3Ah=”03h” ........................................ 69
8.7.11 Write data for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3Ah=”05h” ...................................... 70
8.7.12 Write data for 18-bit/pixel (RGB-6-6-6-bit input), 262K-Colors, 3Ah=”06h” .................................... 70
8.7.13 4-Line Serial Interface ......................................................................................................................... 71
8.7.14 Write data for 12-bit/pixel (RGB 4-4-4-bit input), 4K-Colors, 3Ah=”03h” ........................................ 71
8.7.15 Write data for 16-bit/pixel (RGB-5-6-5-bit input), 65K-Colors, 3Ah=”05h” ...................................... 72
8.7.16 Write data for 18-bit/pixel (RGB-6-6-6-bit input), 262K-Colors, 3Ah=”06h” .................................... 73
8.8 RGB I NTERFACE ............................................................................................................................................. 74
8.8.1 RGB Interface Selection ............................................................................................................................ 74
8.8.2 RGB Color Format ................................................................................................................................... 74
8.8.3 RGB Interface Definition .......................................................................................................................... 76
8.8.4 RGB Interface Mode Selection .................................................................................................................. 77
8.8.5 RGB Interface Timing ............................................................................................................................... 78
8.9 VSYNC I NTERFACE ....................................................................................................................................... 81
8.9.1 6-bit RGB Interface ................................................................................................................................... 81
8.9.2 VSYNC Interface Mode ............................................................................................................................. 83
8.10 D ISPLAY D ATA RAM ...................................................................................................................................... 85
8.10.1 Configuration ....................................................................................................................................... 85
8.10.2 Memory to display address mapping .................................................................................................... 86
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8.11 A DDRESS C ONTROL ........................................................................................................................................ 87
8.12 N ORMAL D ISPLAY O N OR P ARTIAL M ODE O N , V ERTICAL S CROLL O FF .......................................................... 89
8.13 V ERTICAL S CROLL M ODE ............................................................................................................................... 91
8.13.1 Rolling scroll ........................................................................................................................................ 91
8.13.2 Vertical Scroll Example ........................................................................................................................ 93
8.14 T EARING E FFECT ............................................................................................................................................ 95
8.14.1 Tearing effect line modes ...................................................................................................................... 95
8.14.2 Tearing effect line timings .................................................................................................................... 96
8.14.3 Example 1: MPU Write is faster than panel read................................................................................. 97
8.14.4 Example 2: MPU write is slower than panel read ............................................................................... 98
8.15 P OWER ON/OFF S EQUENCE ........................................................................................................................... 99
8.15.1 Uncontrolled Power Off ..................................................................................................................... 100
8.16 P OWER L EVEL D EFINITION ........................................................................................................................... 101
8.16.1 Power Level........................................................................................................................................ 101
8.17 P OWER F LOW C HART ................................................................................................................................... 102
8.18 G AMMA C ORRECTION .................................................................................................................................. 103
8.19 G RAY VOLTAGE GENERATOR FOR DIGITAL GAMMA CORRECTION ................................................................... 108
8.20 D ISPLAY D IMMING ....................................................................................................................................... 109
8.20.1 General Description ........................................................................................................................... 109
8.20.2 Dimming Requirement ........................................................................................................................ 109
8.20.3 Definition of brightness transition time............................................................................................... 111
8.21 C ONTENT A DAPTIVE B RIGHTNESS C ONTROL (CABC) ................................................................................. 112
8.21.1 Definition of CABC ............................................................................................................................ 112
8.21.2 Minimum brightness setting of CABC function .................................................................................. 116
9 COMMAND ........................................................................................................................................................ 118
9.1 S YSTEM F UNCTION C OMMAND T ABLE 1 ....................................................................................................... 118
9.1.1 NOP (00h) ............................................................................................................................................... 123
9.1.2 SWRESET (01h): Software Reset ............................................................................................................ 124
9.1.3 RDDID (04h): Read Display ID ............................................................................................................. 126
9.1.4 RDDST (09h): Read Display Status ........................................................................................................ 128
9.1.5 RDDPM (0Ah): Read Display Power Mode ........................................................................................... 131
9.1.6 RDDMADCTL (0Bh): Read Display MADCTL ...................................................................................... 133
9.1.7 RDDCOLMOD (0Ch): Read Display Pixel Format ............................................................................... 135
9.1.8 RDDIM (0Dh): Read Display Image Mode ............................................................................................ 137
9.1.9 RDDSM (0Eh): Read Display Signal Mode ............................................................................................ 139
9.1.10 RDDSDR (0Fh): Read Display Self-Diagnostic Result ...................................................................... 141
9.1.11 SLPIN (10h): Sleep in ........................................................................................................................ 143
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9.1.12 SLPOUT (11h): Sleep Out .................................................................................................................. 145
9.1.13 PTLON (12h): Partial Display Mode On ........................................................................................... 147
9.1.14 NORON (13h): Normal Display Mode On ......................................................................................... 148
9.1.15 INVOFF (20h): Display Inversion Off ............................................................................................... 149
9.1.16 INVON (21h): Display Inversion On .................................................................................................. 151
9.1.17 GAMSET (26h): Gamma Set .............................................................................................................. 153
9.1.18 DISPOFF (28h): Display Off ............................................................................................................. 155
9.1.19 DISPON (29h): Display On ............................................................................................................... 157
9.1.20 CASET (2Ah): Column Address Set .................................................................................................... 159
9.1.21 RASET (2Bh): Row Address Set ......................................................................................................... 161
9.1.22 RAMWR (2Ch): Memory Write .......................................................................................................... 163
9.1.23 RAMRD (2Eh): Memory Read ........................................................................................................... 165
9.1.24 PTLAR (30h): Partial Area ................................................................................................................ 167
9.1.25 VSCRDEF (33h): Vertical Scrolling Definition .................................................................................. 169
9.1.26 TEOFF (34h): Tearing Effect Line OFF ............................................................................................ 172
9.1.27 TEON (35h): Tearing Effect Line On ................................................................................................. 174
9.1.28 MADCTL (36h): Memory Data Access Control ................................................................................. 176
9.1.29 VSCSAD (37h): Vertical Scroll Start Address of RAM ....................................................................... 179
9.1.30 IDMOFF (38h): Idle Mode Off .......................................................................................................... 181
9.1.31 IDMON (39h): Idle mode on .............................................................................................................. 183
9.1.32 COLMOD (3Ah): Interface Pixel Format .......................................................................................... 185
9.1.33 WRMEMC (3Ch): Write Memory Continue ....................................................................................... 186
9.1.34 RDMEMC (3Eh): Read Memory Continue ........................................................................................ 188
9.1.35 STE (44h): Set Tear Scanline ............................................................................................................. 190
9.1.36 GSCAN (45h): Get Scanline ............................................................................................................... 192
9.1.37 WRDISBV (51h): Write Display Brightness ....................................................................................... 194
9.1.38 RDDISBV (52h): Read Display Brightness Value .............................................................................. 196
9.1.39 WRCTRLD (53h): Write CTRL Display ............................................................................................. 198
9.1.40 RDCTRLD (54h): Read CTRL Value Display .................................................................................... 200
9.1.41 WRCACE (55h): Write Content Adaptive Brightness Control and Color Enhancement .................... 202
9.1.42 RDCABC (56h): Read Content Adaptive Brightness Control ............................................................ 204
9.1.43 WRCABCMB (5Eh): Write CABC Minimum Brightness .................................................................... 206
9.1.44 RDCABCMB (5Fh): Read CABC Minimum Brightness..................................................................... 208
9.1.45 RDABCSDR (68h): Read Automatic Brightness Control Self-Diagnostic Result .............................. 209
9.1.46 RDID1 (DAh): Read ID1 ................................................................................................................... 211
9.1.47 RDID2 (DBh): Read ID2 ................................................................................................................... 212
9.1.48 RDID3 (DCh): Read ID3 ................................................................................................................... 213
9.2 S YSTEM F UNCTION C OMMAND T ABLE 2 ....................................................................................................... 214
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9.2.1 RAMCTRL (B0h): RAM Control ............................................................................................................. 219
9.2.2 RGBCTRL (B1h): RGB Interface Control............................................................................................... 222
9.2.3 PORCTRL (B2h): Porch Setting ............................................................................................................. 224
9.2.4 FRCTRL1 (B3h): Frame Rate Control 1 (In partial mode/ idle colors) ................................................. 225
9.2.5 PARCTRL (B5h): Partial mode Control .................................................................................................. 227
9.2.6 GCTRL (B7h): Gate Control ................................................................................................................... 229
9.2.7 GTADJ (B8h): Gate On Timing Adjustment ............................................................................................ 231
9.2.8 DGMEN (BAh): Digital Gamma Enable ................................................................................................ 233
9.2.9 VCOMS (BBh): VCOMS Setting ............................................................................................................. 234
9.2.10 LCMCTRL (C0h): LCM Control ........................................................................................................ 236
9.2.11 IDSET (C1h): ID Code Setting ........................................................................................................... 237
9.2.12 VDVVRHEN (C2h): VDV and VRH Command Enable ...................................................................... 238
9.2.13 VRHS (C3h): VRH Set ........................................................................................................................ 239
9.2.14 VDVS (C4h): VDV Set ........................................................................................................................ 241
9.2.15 VCMOFSET (C5h): VCOMS Offset Set ............................................................................................. 243
9.2.16 FRCTRL2 (C6h): Frame Rate Control in Normal Mode ................................................................... 245
9.2.17 CABCCTRL (C7h): CABC Control .................................................................................................... 247
9.2.18 REGSEL1 (C8h): Register Value Selection 1 ..................................................................................... 248
9.2.19 REGSEL2 (CAh): Register Value Selection 2 ..................................................................................... 249
9.2.20 PWMFRSEL (CCh): PWM Frequency Selection ............................................................................... 250
9.2.21 PWCTRL1 (D0h): Power Control 1 ................................................................................................... 251
9.2.22 VAPVANEN (D2h): Enable VAP/VAN signal output .......................................................................... 253
9.2.23 CMD2EN (DFh): Command 2 Enable ............................................................................................... 254
9.2.24 PVGAMCTRL (E0h): Positive Voltage Gamma Control .................................................................... 255
9.2.25 NVGAMCTRL (E1h): Negative Voltage Gamma Control .................................................................. 257
9.2.26 DGMLUTR (E2h): Digital Gamma Look-up Table for Red ............................................................... 259
9.2.27 DGMLUTB (E3h): Digital Gamma Look-up Table for Blue .............................................................. 261
9.2.28 GATECTRL (E4h): Gate Control ....................................................................................................... 263
9.2.29 SPI2EN (E7h): SPI2 Enable .............................................................................................................. 265
9.2.30 PWCTRL2 (E8h): Power Control 2 ................................................................................................... 266
9.2.31 EQCTRL (E9h): Equalize time control .............................................................................................. 267
9.2.32 PROMCTRL (ECh): Program Mode Control ..................................................................................... 269
9.2.33 PROMEN (Fah): Program Mode Enable ........................................................................................... 270
9.2.34 NVMSET (FCh): NVM Setting ........................................................................................................... 271
9.2.35 PROMACT (FEh): Program action ................................................................................................... 272
10 APPLICATION ................................................................................................................................................... 273
10.1 C ONFIGURATION OF P OWER S UPPLY C IRCUIT ............................................................................................... 273
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10.2 V OLTAGE G ENERATION ................................................................................................................................. 274
10.3 R ELATIONSHIP ABOUT SOURCE VOLTAGE ...................................................................................................... 275
10.4 A PPLIED V OLTAGE TO THE TFT PANEL ......................................................................................................... 276
11 REVISION HISTORY ........................................................................................................................................ 277