同步复位十位计数器verilog HDL语言程序以及仿真文件下载.rar

【实例简介】
同步复位十位计数器verilog HDL语言程序以及仿真文件下载
【实例截图】
【核心代码】
14914031ce07b360d0c0d3befc53eeb7.rar
└── count_10
├── count_10.asm.rpt
├── count_10.done
├── count_10.fit.rpt
├── count_10.fit.summary
├── count_10.flow.rpt
├── count_10.map.rpt
├── count_10.map.summary
├── count_10.pin
├── count_10.qpf
├── count_10.qsf
├── count_10.qws
├── count_10.sim.rpt
├── count_10.tan.rpt
├── count_10.tan.summary
├── count_10.v
├── count_10.vwf
└── db
├── add_sub_1sh.tdf
├── count_10.(0).cnf.cdb
├── count_10.(0).cnf.hdb
├── count_10.asm.qmsg
├── count_10.cbx.xml
├── count_10.cmp0.ddb
├── count_10.cmp.cdb
├── count_10.cmp.hdb
├── count_10.cmp.kpt
├── count_10.cmp.logdb
├── count_10.cmp.rdb
├── count_10.cmp.tdb
├── count_10.db_info
├── count_10.dbp
├── count_10.eco.cdb
├── count_10.eds_overflow
├── count_10.fit.qmsg
├── count_10.fnsim.cdb
├── count_10.fnsim.hdb
├── count_10.fnsim.qmsg
├── count_10.hier_info
├── count_10.hif
├── count_10.map.cdb
├── count_10.map.hdb
├── count_10.map.logdb
├── count_10.map.qmsg
├── count_10.pre_map.cdb
├── count_10.pre_map.hdb
├── count_10.psp
├── count_10.rtlv.hdb
├── count_10.rtlv_sg.cdb
├── count_10.rtlv_sg_swap.cdb
├── count_10.sgdiff.cdb
├── count_10.sgdiff.hdb
├── count_10.signalprobe.cdb
├── count_10.sim.hdb
├── count_10.sim.qmsg
├── count_10.sim.rdb
├── count_10.sim.vwf
├── count_10.sld_design_entry_dsc.sci
├── count_10.sld_design_entry.sci
├── count_10.syn_hier_info
├── count_10.tan.qmsg
└── wed.zsf

2 directories, 60 files