Soc Designer教程

【实例简介】
Soc仿真建模，架构评估测试软件教程。官方原版。
Contents Realview SoC Designer Tutorial ARM Libraries Preface About this document Feedback XVI Chapter 1 Installation Requirements 1-2 1.2 Installing the models 13 1.3 Installing Real View@ Debugger (RVD) Chapter 2 Creating an ARM-Based System 2.1 Description of the aRm-based system 2-2 2.2 Adding the arm core… 2-3 Adding MX2 AHB and ahB Bus…… 2-6 2.4 Adding the memories 2-7 2.5 Adding the aPb bus and peripherals 2-9 2.6 Connecting the components 2-10 2.7 Adding labels 2-12 2.8 Configuring the memory map 2-14 2.9 Starting the simulation 2-21 Chapter 3 Running the Cycle-Approximate Simulation 3.1 Overview 3-2 ARM DUI 0329D Copyright C 2006-2007 ARM Limited. All rights reserved Confidential 3.2 Simulating the ARM9E-CX example…… 3-3 3.3 Running the simulation. 3.4 Saving and reloading a simulation 3-11 3.5 Attaching the RealView Debugger 3-16 Chapter 4 Running the Cycle-accurate Simulation 4.1 Overview∴ 4-2 4.2 Opening the ARM926EJ-S(CA) model………………….4-3 4.3 Profiling…… 4-6 4.4 Attaching a bus monitor 4-12 Chapter 5 Creating a Custom Peripheral 5.1 Interrupt controller specification…… .5-2 52 Planning the Soc Designer component design 5-3 5.3 Creating the component with the soc designer component wizard ........5-4 54 Adding functionality… 5-14 5.5 Testing the component 5-27 5.6 Additional Component Improvements 5-31 5.7 Using the CaPI profiling interface 5-34 5.8 Extending the CADi interface 5-41 Appendix a Building your own ARM application A.1 Build process A-2 Appendix B Troubleshooting B.1 Soc Designer Canvas errors B-2 B.2 SoC Designer Simulator errors B-4 Copyright C 2006-2007 ARM Limited. All rights reserved ARM DUI 0329D Confidential List of tables Realview SoC Designer Tutorial ARM Libraries Change history Table 5-1 Memory-mapped registers 5-2 ARM DUI 0329D Copyright C 2006-2007 AR/ Limited. All rights reserved. Confidential Copyright C 2006-2007 ARM Limited. All rights reserved ARM DUI 0329D Confidential List of Figures Realview Soc Designer Tutorial ARM Libraries Figure 1-1 Preferences dialog with list of configuration files 1-4 Figure 2-1 Sample ARM system ........ 2-2 Figure 2-2 Component and design windows 2-3 Figure 2-3 Resizing the component Figure 2-4 Moving a port connection 面面面BB国国国国面面面面BB国 2-4 Figure 2-5 Renaming the processor core component 2-5 Figure 2-6 Bridge and ahb bus added to system 2-6 Figure 2-7 Configuring the program memory 2-8 Figure 2-8 System with memories added 2-8 Figure 2-9 System with components 2-9 Figure 2-10 Connecting the core and the bridge 2-10 Figure 2-11 Repositioning a connection 2-11 Figure 2-12 Placing a label 2-12 Figure 2-13 Specifying label text and color ∴2-13 Figure 2-14 Memory Map Editor dialog with default values 2-15 Figure 2-15 Edit Address region dialog for apb bus 2-16 Figure 2-16 Parameters for the aPB_ Bus component 2-17 Figure 2-17 Copying the start and Size parameters 2-18 Figure 2-18 Modified values in Memory Map Editor ∴2-18 Figure 2-19 Memory Map Editor with new values for AHB_Bus space 2-19 Figure 2-20 Use mme not set 2-19 Figure 2-21 Overlapping address regions 2-20 Figure 2-22 Memory map for APB bus 2-20 ARM DUI 0329D Copyright C 2006-2007 ARM Limited. All rights reserved Confidential Figure 3-1 Select the application file to load into program memory 3-3 Figure 3-2 Soc Designer with simulation file loaded 3-4 Figure 3-3 Setting a breakpoint on the interrupt line 3-5 Figure 3-4 Console l/o window to enter the number 3-5 Figure 3-5 Console Window output… 3-6 Figure 3-6 Register view for core 3-6 Figure 3-7 Adding a trace on the isrc signal 3-7 Figure 3-8 The waveform view showing the interrupt signal 3-8 Figure 3-9 Disassembly view of code 3-8 Figure 3-10 EXecuting 1000 program steps 3-9 Figure 3-11 Viewing data memory 3-10 Figure 3-12 Select type dialog 3-11 Figure 3-13 Select file name 3-12 Figure 3-14 SoC Designer Simulator .3-13 Figure 3-15 Selecting the simulation 3-14 Figure 3-16 Selecting a new application .3-15 Figure 3-17 Source coloring dialog 3-16 Figure 3-18 RVD connected to simulation 3-17 Figure 3-19 No source image for RVd 3-18 Figure 3-20 Select Local File to Load dialog……… 3-19 Figure 3-21 Disassembly for code 3-20 Figure 3-22 Breakpoint on source code 3-2 Figure 4-1 ARM926EJ-S (CA) example in SoC Designer Simulator. .....4-3 Figure 4-2 Console o window 4-4 Figure 4-3 Mode changing from the USR mode to IRQ and jumping to IRQ vector location.. 4-5 Figure 4-4 Parameters for the core component 4-7 Figure 4-5 Profiling Manager dialog 4-8 Figure 4-6 AHB Bus profile with a segment size of100………… 4-9 Figure 4-7 Zoomed in ahb Bus profile for a segment size of 100 ..4-10 Figure 4-8 AHB Bus profile viewed on a cycle-by-cycle basis 4-10 Figure 4-9 Core Instruction Cache profiling view .4-11 Figure 4-10 Core Data Cache profiling view 4-11 Figure 4-11 Placing a monitor on the bus to PMEm... 4-12 Figure 4-12 Small version of monitor window 4-12 Figure 4-13 Monitoring the AHB bus connection to PMEM 4-13 Figure 4-14 Monitoring the master port in the AHBBus component 4-13 Figure 4-15 Monitor history for the master port ∴4-14 Figure 5-1 Component Wizard dialog 5-4 Figure 5-2 Component Attributes 5-5 Figure 5-3 Port name and type 5-6 Figure 5-4 Ports added to component…… Figure 5-5 Component parameters 5-8 Figure 5-6 Component registers 5-9 Figure 5-7 Summary of component specifications 5-11 Figure 5-8 Generation options 5-12 Figure 5-9 Component generated… 5-12 Figure 5-10 Component interaction for the interrupt controller 5-15 Copyright C 2006-2007 ARM Limited. All rights reserved ARM DUI 0329D Confidential Figure 5-11 Update phase modifies state variables 5-16 Figure 5-12 AHB_ Stub test system 5-27 Figure 5-13 Profiling interrupt controller 5-39 Figure 5-14 Monitor on interrupt signal 5-40 Figure 5-15 New tab in register window 5-42 Figure A-1 Select application file to load A-3 Figure B-1 Fatal error B-2 Figure B-2 Overlapping memory .B-2 Figure B-3 Port not connected B-3 Figure B-4 Clock disabled B-4 ARM DUI 0329D Copyright C 2006-2007 ARM Limited. All rights reserved Confidential Copyright C 2006-2007 ARM Limited. All rights reserved ARM DUI 0329D Confidential 【实例截图】
【核心代码】