Computer Architecture:A Quantitative Approach(5th)

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英文版,带online appendix D ~ L,完整书签,已经合并.合计1400多页.
The new edition of this now classic textbook highlights the ascendance of explicit parallelism(data, thread, request) by devoting a whole chapter to each type. The chapter on data parallelism is particularly illuminating: the comparison and contrast between Vector SiMD. instruction level simd. and gpu cuts through the jargon associated with each architecture and exposes the similarities and differences between these architectures -Kunle Olukotun, Stanford University The fifth edition of Computer Architecture: A Quantitative Approach explores the various parallel concepts and their respective tradeoffs. As with the previous editions, this new edition covers the latest technology trends two highlighted are the explosive growth of Personal Mobile Devices(PMD)and Warehouse Scale Computing (wsC)-where the focus has shifted towards a more sophisticated balance of performance and energy efficiency as compared with raw perfor- mance. These trends are fueling our demand for ever more processing capability which in turn is moving us further down the parallel path Andrew N. Sloss, Consultant Engineer, ARM Author of aRM System Developer's guide Computer Architecture A Quantitative Approach Fifth edition John L. Hennessy is the tenth president of stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science Hennessy is a Fellow of the lEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the american Academy of Arts and Sciences. Among his many awards are the 2001 Eckert Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates n 1981, he started the MIPS project at Stanford with a handful of graduate students. After completing the project in 1984, he took a leave from the university to cofound MIPS Computer Systems (now MIPS Technologies), which developed one of the first commercial rISO microprocessors. As of 2006, over 2 billion MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches Hennessy subsequently led the DASH (Director Architecture for Shared Memory) project, which prototyped the first scalable cache coherent multiprocessor; many of the key ideas have beer adopted in modern multiprocessors. In addition to his technical activities and university responsibilities, he has continued to work with numerous start-ups both as an early-stage advisor and an investor David A. Patterson has been teaching computer architecture at the University of California, Berkeley, since joining the faculty in 1977, where he holds the Pardee Chair of Computer Science. His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE Technical Achievement Award and the ACm eckert-Mauchly Award for contributions to RISC, and he shared the ieee Johnson Information Storage Award for contributions to RAID. He also shared the lEEE John von Neumann Medal and the C&c prize with John Hennessy. Like his co-author, Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the Cs division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM This record led to Distinguished Service Awards from ACM and CrA At Berkeley, Patterson led the design and implementation of risc I, likely the first VLsI reduced instruction set computer, and the foundation of the commercial SPARC architecture. He was a leader of the Redundant Arrays of Inexpensive Disks(RAID) project, which led to dependable storage systems from many companies. He was also involved in the Network of Workstations (NOW) project, which led to cluster technology used by Internet companies and later to cloud computing. These projects earned three dissertation awards from ACM. His current research projects are Algorithm-Machine-People Laboratory and the Parallel Computing Laboratory, there he is director. The goal of the aMP Lab is develop scalable machine learning algorithms, warehouse-scale-computer-friendly programming models, and crowd-sourcing tools to gain valueable insights quickly from big data in the cloud. The goal of the Par Lab is to develop tech ologies to deliver scalable, portable, efficient, and productive software for parallel personal mobile devices Computer Architecture A Quantitative Approach Fifth edition John L Hennessy Stanford University David a. patterson University of California, Berkeley With Contributions b Norman P. Joupp Krste asanovic University of California, Berkeley Sheng li Jason d bakos University of South Carolina Naveen muralimanohar Robert p colwell R&E Colwell& assoc Inc Gregory D. Peterson Thomas M. Conte University of Tennessee North Carolina State University Timothy M. Pinkston Jose duato Universitat politecnica de valencia and simula Parthasarathy Ranganathan Diana franklin HP Labs University of California, Santa Barbara David a wood David Goldberg /niversity of Wisconsin-Madison The scripps research nstitute Amr zak University of Santa clara Amsterdan· Boston· Heidel g M< New York· Oxford· Paris· San Diego MORGAN KAUFMANN ELSEVIER San francisco· Singapore. Sydney· Tokyo Acquiring Editor: Todd Green Development Editor: Nate McFadden Project Manager: Paul gottehrer Designer: Joanne Blank Morgan Kaufmann is an imprint of Elsevier 225 Wyman Street, Waltham, MA 02451, USA o 2012 Elsevier, Inc. All rights reserved No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or any information storage and retrieval system, without permission in writing from the publisher. Details on how to seek permission, further informa tion about the Publishers permissions policies and our arrangements with organizations such as the Copyright Clearance Center and the Copyright Licensing Agency, can be found at our website www.elseviercomypermisstons. This book and the individual contributions contained in it are protected under copyright by the Publisher(other than as may be noted herein) Notices Know ledge and best practice in this field are constantly changing. As new research and experience broaden our understanding, changes in research methods or professional practices, may become necessary. Practitioners and researchers must always rely on their own experience and knowledge in evaluating and using any information or methods described herein. In using such information or methods they should be mindful of their own safety and the safety of others, including parties for whom they have a professional responsibility To the fullest extent of the law neither the publisher nor the authors contributors or editors assume any liability for any injury and/or damage to persons or property as a matter of products liability, neg- ligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas contained in the material herein Library of Congress Cataloging-in-Publication Data Application submitted British Library Cataloguing-in-Publication Data A catalogue record for this book is available from the British Library ISBN:978-0-12-383872-8 For information on all MK publications visitourwebsiteatwww.mkp.com Printed in the united states of america l11213141510987654321 Typeset by: diacriTech, Chennai, India Worki g together to grow libraries in developing countries www.elsevier.comwww.bookaid.orgwww.sabre.org Elsevier bOOKaId Sabre Foundation To Andrea, linda, and our four sons This page intentionally left blank Foreword by Luiz Andre barroso, google nc The first edition of Hennessy and Pattersons Computer Architecture: A Quanti tative Approach was released during my first year in graduate school. I belong, therefore, to that first wave of professionals who learned about our discipline using this book as a compass. Perspective being a fundamental ingredient to a useful Foreword, I find myself at a disadvantage given how much of my own views have been colored by the previous four editions of this book. Another obstacle to clear perspective is that the student-grade reverence for these two superstars of Computer Science has not yet left me, despite (or perhaps because of) having had the chance to get to know them in the years since. These disadvan tages are mitigated by my having practiced this trade continuously since this books first edition, which has given me a chance to enjoy its evolution and enduring relevance The last edition arrived just two years after the rampant industrial race for higher cPu clock frequency had come to its official end, with Intel cancelling its 4 GHz Single-core developments and embracing multicore CPUs. Two years was plenty of time for John and Dave to present this story not as a random product line update, but as a defining computing technology inflection point of the last decade. That fourth edition had a reduced emphasis on instruction-level parallel- ism (ILP)in favor of added material on thread-level parallelism, something the current edition takes even further by devoting two chapters to thread- and data level parallelism while limiting ILP discussion to a single chapter. Readers who are being introduced to new graphics processing engines will benefit especiall from the new Chapter 4 which focuses on data parallelism, explaining the different but slowly converging solutions offered by multimedia extensions in general-purpose processors and increasingly programmable graphics processing units.Of notable practical relevance: If you have ever struggled with CUDA terminology check out Figure 4.24(teaser: Shared Memory"is really local while"Global Memory"is closer to what youd consider shared memory) Even though we are still in the middle of that multicore technology shift, this edition embraces what appears to be the next major one: cloud computing. In this case, the ubiquity of Internet connectivity and the evolution of compelling web services are bringing to the spotlight very small devices(smart phones, tablets) X 【实例截图】
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