FMC接口标准

【实例简介】
FMC标准接口说明，英文版 现在Xilinx、Alter等主流FPGA厂商大多使用FMC接口，其对应有很多FMC扩展子板
( This page left blank intentionally. ANSI/VITA 57.1-2008 Approved American Nation ANSI American National Standard for fpga mezzanine card (FMC) Standard Secretariat VMEbus international Trade association Approved July 2008 American National standards institute. inc Abstract This standard specifies a form factor and a pin assignment for FPGa mezzanine modules American Approval of an American National Standard requires verification by aNSi that the requirements for due process National consensus, and other criteria for approval have been met Standard by the standards developer Consensus is established when, in the judgment of the ANSI Board of Standards Review, substantial agreement has been reached by directly and materially affected interests. Substantial agreement means much more than a simple majority, but not necessarily unanimity Consensus requires that all views and objections be considered. and that a concerted effort be made toward their resolution The use of American National Standards is completely voluntary; their existence does not in any respect preclude anyone, whether he has approved the standards or not from manufacturing, marketing, purchasing, or using products, processes, or procedures not conforming to the standards The American National Standards institute does not develop standards and will in no circumstances give an interpretation of any American National Standard Moreover, no person shall have the right or authority to issue an interpretation of an American National Standard in the name of the american national standard institute Requests for interpretations should be addressed to the secretariat or sponsor whose name appears on the title page of this standard CAUTION NOTICE: This American National Standard may be revised or withdrawn at any time. The procedures of the american National standards Institute require that action be taken periodically to reaffirm, revise, or withdraw this standard. purchases of american national standards may receive current information on all standard by calling or writing the American National Standards Institute Published by VMEbus international trade Association PO Box 19658. Fountain Hills. AZ 85269 Copyright o 2008 by VMEbus International Trade Association All rights reserved No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without prior written permission of the publisher Printed in the United States of America-R1.0. isbn 1-885731-49-3 ANSI/VITA 57.1, FPGA Mezzanine Card(FMC) Standard TABLE OF CONTENTS Introduction… 1. Objectives 2. FMC Overview 3. Standard Terminology. 4. FMC Definitions References 1. 6. Dimensions..........................15 FMC Compliance....... p 1. FMC Mezzanine Module's Minimum Features p 2. FMC Carrier Card's Minimum Fcatures......... FMC Mezzanine module..…………,……17 vⅤ erview∴….…………,…,………… B.2. Single Width Mezzanine module D垂垂 20 3. Double width mezzanine module ,21 4. Connectors 24 3.4.1. Variable stacking heights................25 B.4.2 Ground connections 甲··.·····.··································:············ 27 3.4.3. Connector Pads and Labeling..... 27 3.4.4. Connector Assembl 28 Conduction Cooled mezzanine modules Single width module .·.···.··:..···:····.······.····.···.············ 5.2. Double width module ……32 3. Conduction Cooled .34 3.5. 4. Thermal interfaces 34 3.5.5. Air cooled and conduction cooled compatibility ............35 6. FMC Front Panel Bezel 3. 1. FMC Mezzanine module to Carrier Card relationship. ,39 A FMC Carrier Card .. 垂垂垂垂音垂·垂垂垂看垂着·垂垂垂是··垂垂垂章·看·希·垂···垂垂 40 1. Overview 40 1. 1. Carrier Card side 1 component height.......... 46 Connector pin assignments ……48 1. User Defined Pins.............................53 2. Differential Reference Clocks 3. Gigabit Interface 58 .3. 1. Gigabit Data Signals bD4音番 58 5.3.2. Gigabit reference clocks. 4. JTAG Signals 5. 12C Bus Signals....... 。垂看 .62 IPMI Support 63 6. Geographic Addresses .6 .7. IO Mezzanine module present.………67 8. Power Good signals 67 9. Reserved Signals 68 Page 5 ANSI/VITA 57.1, FPGA Mezzanine Card(FMC) Standard 10. Power Supply requirements …68 Power Sequencing……… 5.12 3.3V Auxiliary Supply IO Reference Voltage 14. 1O Bank supply voltage Electrical requirements 1. Multi-standard Signal Banks 6.1.1. Supported Signaling Standards ∴,74 6.1.2 Compatibility and interoperability 75 Appendix a mezzanine/ Carrier Card Compatibility Check List ......77 Page 6 ANSI/VITA 57.1, FPGA Mezzanine Card(FMC) Standard List of figures fgure 1. Typical example of single width commercial grade FMC Module.. Figure 2. Typical example of double width commercial grade FMC Module.....18 Figure 3. Dimensional descriptors for FMC Mezzanine Module... Figure 4. PCB regions of Mezzanine module Figure 5. Single Width Commercial Grade FMC Module Mechanical ···.··· 20 Figure 6. Double Width Commercial Grade FMC Module Mechanical...2 Figure 7. Double width with only primary connector, P1 23 Figure 8. Double width with both connectors, Pl and P2....... 23 Figure 9. Board to board height limits Figure 10. Carrier Card Connector Grid Labeling(Component Side View ). 28 Figurc 11. FMC Module Connector Grid Labeling( Component Side Vicw).28 Figure 12. Typical example of single width conduction cooled FMC Module with primary and secondary thermal interfaces.........30 Figure 13. Single Width Conduction Cooled FMC Module Mechanical... 垂垂 Figure 14. Example of double width conduction cooled FMC Module 32 Figure 15. Double width Conduction Cooled FMC Mezzanine Module Mechanical.33 Figure 16. FMC Front Panel Bezel Mechanical Dimensions 38 Figure 17. FMC Mezzanine Module to Carrier Card dimensions 39 甲· Figure 18. Typical 6U carrier card with double and single width module.40 Figure 19. Example of 6U carrier with no external mezzanine I/O... Figure 20. Typical 6U carrier card loaded with three single width commercial mezzanine modules… igure 21. Typical 6U ruggedized carrier card loaded with three single width ruggedized mezzanine modules 42 Figure 22. Dimensions of cPCI carrier card example with two FMC sites....43 Figure 23. Example of 3U cPCI carrier with single with FMC Module...44 Figure 24. Dimensions of AMC with one FMC site and flush bezel Figurc 25. Dimensions of AMC with onc FMC sitc and no rcccss...... 46 Page 7 ANSI/VITA 57.1, FPGA Mezzanine Card(FMC) Standard Abstract This standard describes fmc io modules and introduces an electro-mechanical standard that creates a low overhead protocol bridge. This is between the front panel io, on the mezzanine module, and an FPGa processing device on the carrier card, which accepts the mezzanine module FPGA is an acronym for"Field Programmable gate array' which is a semiconductor device that can have its logic functionality defined after it has been supplied to the field Some devices can be one time programmable while others can be programme d many times with different functionality on each configuration FPGAs typically consist of an array of logic cells which implement small logical operations and is surrounded by peripheral lo which can be programmed for different signaling standards. In some devices there may be dedicated silicon for more advanced functions, such as multipliers, memory, processors, etc. Programmable interconnect within these devices enable linking of the logic cells, peripheral IO and the optional dedicated functional blocks hence facilitating the functionality of the complete device Foreword The purpose of this standard is to create an IO mezzanine module, which works intimately with an FPGa processing device. The focus is to create a mezzanine module that minimizes the handling and formatting of the transceived data. The aims are to Maximize data throughput Minimize latency Reduce FPGa design complexity Minimize system costs Reduce system overheads This standard takes a new approach on interface protocols by removing the need to inject protocol data into the raw data to be processed It assumes that the fpga has a unique closeness with the l o mezzanine module. This enables modification of the fpga to process the raw data formats that the module sources and sinks Although the key instigator for the data handling within this standard is the FPGa, it is not a prerequisite that an fPga connects to the mezzanine module. However, the connected device must meet all the rules within this specification Page 8 ANSI/VITA 57.1, FPGA Mezzanine Card(FMC) Standard Working Group Members At the time writing, the Working group for this standard has these members Name Company Keith baker Alpha Data Bill blyth Alpha data David miller Alpha data Paul Kowachwski Annapolis micro sys Noah donaldson Annapolis micro sys Jenny donaldson Annapolis Micro Sys Bob donaldson Annapolis micro Sys Jerry palmer Catalina(Drs-ss Jing kwok Curtiss wright John Wemekamp Curtiss wright Steve edwards Curtiss wright lan stalker Curtiss wright John freeburn Mercury Craig lund Mercury Shep siegel ercury Bob levine Mercury Mike jadon Micro memories Malachy devlin Nallatech Neil harold Nallatech Craig Petrie Nallatech Craig sanderson Nallatech Hugo Andrade National instruments Rvan brown National Instruments Joe Peck National Instruments John Walker englan David givens Samtec John rynearson ⅤITA Dave barker METRO Paul garnett Ⅴ METRO Raj eelam Xilinx David squires Xilinx Manuel uhm Xilinx Ed Mcgettigan linx Brad taylor Xilinx Brad Giffel Xilinx Brian von herzen Xilinx Page 【实例截图】
【核心代码】