Structured Computer Organization 6th edition

【实例简介】
Structured Computer Organization 6th edition 结构化计算机组成 第六版
This page intentionally left blank STRUCTURED COMPUTER ORGANIZATION SIXTH EDITION ANDREW S TANENBAUM Vrije universiteit Amsterdam, The netherlands TODD AUSTIN University of michigan Ann Arbor, Michigan, United states PEARSON Boston Columbus Indianapolis New York San Francisco Upper Saddle River Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montreal Toronto Delhi Mexico City Sao Paulo Sydney Hong Kong Seoul Singapore Taipei Tokyo Editorial director ECS: Marcia Horton Executive Editor: Tracy Johnson(Dunkelberger) Associate Editor: Carole Snyder Director of Marketing: Christy Lesko Marketing Manager: Yez Alayan Senior marketing Coordinator: Kathryn ferranti Director of Production: Erin gregg Managing Editor: Jeff Holcomb Associate Managing Editor: Robert Engelhardt Manufacturing Buyer: Lisa McDowell Art Director: Anthony gemmellaro Cover illustrator Jason Consalvo Manager, Rights and Permissions: Michael Joyce Media editor: daniel sandin Media project Manager: Renata Butera Printer/Binder: Courier/ Westford Cover Printer: Lehigh-Phoenix Color/ Hagerstown Credits and acknowledgments borrowed from other sources and reproduced, with permission in this textbook appear in the Credits section in the end matter of this text Copyright C 2013, 2006, 1999 Pearson Education, Inc, publishing as Prentice Hall. All rights reserved. Printed in the United States of America. This publication is protected by Copyright, and permission should be obtained from the publisher prior to any prohibited reproduction storage in a retrieval system, or transmission in any form or by any means, electronic mechanical, photocopying, recording, or likewise. To obtain permission(s) to use material from this work, please submit a written request to Pearson Education, Inc, Permissions Department, One Lake Street, Upper Saddle River, New Jersey 07458, or you may fax your request to 201-236-3290 Many of the designations by manufacturers and sellers to distinguish their products are claimed as trademarks. Where those designations appear in this book, and the publisher was aware of a trademark claim, the designations have been printed in initial caps or all caps Library of Congress Cataloging-in-Publication Data Structured computer organization/ Andrew S. Tanenbaum, Todd Austin --6th ed Includes bibliographical references and index ISBN-13:978-0-13-291652-3 ISBN-10:0-13-2916525 1. Computer programming. 2. Computer organization. I. Austin, Todd. Il. Title QA766.T382013 005.1-dc23 2012021627 10987654321 PEARSON ISBN10:0-13-291652-5 ISBN13:978-0-13-291652-3 AST. Suzanne, Barbara. Marvin, Aron and Nathan TA: To Roberta, who made space(and time) for me to finish this project This page intentionally left blank CONTENTS PREFACE XIX INTRODUCTION 1 STRUCTURED COMPUTER ORGaNIZaTion 2 1.1.1 Languages, Levels, and Virtual machines 2 1.1.2 Contemporary multilevel Machines 5 1.1.3 Evolution of multilevel machines 8 1.2 MILESTONES IN COMPUTER ARCHITECTURE 13 1.2.1 The Zeroth Generation-Mechanical Computers(1642-1945)13 1.2.2 The First Generation-Vacuum Tubes(1945-1955)16 1.2.3 The Second Generation-Transistors(1955-1965) 19 1.2.4 The Third Generation--Integrated Circuits(1965-1980) 21 1.2.5 The Fourth Generation-Very Large Scale Integration (1980-?)23 1.2.6 The Fifth Generation - Low-Power and Invisible Computers 26 1.3 THE COMPUTER ZOo 28 1.3.1 Technological and Economic forces 28 1.3.2 The Computer Spectrum 30 1.3.3 Disposable Computers 31 1.3.4 Microcontrollers 33 1.3.5 Mobile and game Computers 35 1.3.6 Personal Computers 36 1.3.7 Servers 36 1.3.8 Mainframes 38 CONTENTS 4 EXAMPLE COMPUTER FAMILIES 39 1. 4.1 Introduction to the x 86 Architecture 39 1.4.2 Introduction to the arm architecture 45 1. 4.3 Introduction to the AVr architecture 47 1.5 METRIC UNITS 49 1. 6 OUTLINE OF THIS BOOK 50 2 COMPUTER SYSTEMS 2 PROCESSORS 55 2.1.1 CPU Organization 56 2.1.2 Instruction Execution 58 2.1. 3 RISC versus CISC 62 2. 1.4 Design Principles for Modern Computers 63 2.1.5 Instruction-Level Parallelism 6.5 2.1.6 Processor-Level Parallelism 69 2.2 PRIMARY MEMORY 73 2.2.1Bis74 2.2.2 Memory Addresses 74 2.2.3 Byte Ordering 76 2.2.4 Error-Correcting Codes 78 2. 2. 5 Cache Memory 82 2.2.6 Memory Packaging and Types 8.5 2. 3 SECONDARY MEMORY 86 2.3.1 memory hierarchies 86 2.3.2 Magnetic disks 87 2. 3. 3 IDE Disks 91 2.3 4 sCSi Disks 92 2.3.5RAID94 2.3.6 Solid-State Disks 97 2. 3. 7 CD-ROMs 99 2.3.8 CD-Recordables 103 2.3.9 CD-Rewritables 105 2.3.10DVD106 2.3.11 Blu-ray 108 CONTENTS 2.4 INPUTOUTPUT 108 4.1 Buses 108 2. 4.2 Terminals 113 2.4.3Mice118 2 4 4 Game Controllers 120 2. 4.5 Printers 122 2.4.6 Telecommunications Equipment 127 2.4.7 Digital Cameras 135 2.4.8 Character Codes 137 2.5 SUMMARY 142 3 THE DIGITAL LOGIC LEVEL 3.1 GATES AND BOOLEAN ALGEBRA 147 3.1.1 Gates 148 3.1.2 Boolean Algebra 150 3.1.3 Implementation of Boolean Functions 152 3. 1. 4 Circuit Equivalence 153 3.2 BASIC DIGITAL LOGIC CIRCUITS 158 3.2.1 Integrated Circuits 158 3.2.2 Combinational Circuits 159 3.2.3 Arithmetic circuits 163 3.2.4 Clocks 168 3.3 MEMORY 169 3.3.1 Latches 169 3.3.2 Flip-Flops 172 3.3.3 Registers 174 3.3.4 Memory Organization 174 3.3.5 Memory Chips 17& 3.3.6 RAMs and RoMs 180 3.4 CPU CHIPS AND BUSES 185 3.4.1 CPU Chips 18.5 3.4.2 Computer Buses 187 3.43 Bus Width 190 3.4.4 Bus Clocking 191 3.4.5 Bus arbitration 196 3.4.6 Bus Operations 198 【实例截图】
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