CSR8675_datasheet

【实例简介】
csr 8675 datasheet,资料 ---请注意查看大小,这才是正品
CSR Device details Bluetooth low energy Audio Interfaces Dual-mode bluetooth low energy radio Audio codec with 2 high-quality dedicated ADCs Support for bluetooth basic rate /EDR and low energy 24-bit audio processing support connections a 1 microphone bias generator and up to 2 analogue a 3 Bluetooth low energy connections at the same time as microphone inputs basic rate A2DP Up to 6 digital microphone inputs(MEMS Bluetooth Radio G. 722 compatible, includes improved digital IR filter path On-chip balun(50 Q2 impedance in TX and RX modes) for stop-band attenuation required for G.722 compliance No external trimming is required in producti Enhanced side-tone gain control Bluetooth v4. 1 specification software/ hardware Supported sample rates of 8, 11.025, 16, 22.05, 32, 44.1 Bluetooth Transmitter 48, 96 kHz and 192kHz(DAC only Typical RF transmit power Physical Interfaces Basic rate.5 d Bm ■ UART interface EDR-1 db(relative powe USB 2.0 interface(full-speed) Bluetooth low energy 8 dBm Up to 24 PlOs(includes 8 general purpose PlOs and unused 6-bit DAc level control digital interfaces also available as PlOs) Class 1, Class 2 and Class 3 support without the need for SPI debug and programming interface with read access an external power amplifier or TX/RX switch disable locking Bluetooth Receiver 2×PcM/"sand1× SPDIF supported simultaneously Dual/quad extemal serial flash memory interface s Typical RF receiver sensitivity 3 LED drivers(includes RGB)with PWM flasher on sleep Basic rate-91. 0 dBm EDR-925 dBm Support for up to 6 capacitive touch sensor inputs Bluetooth low energy.0 dBm 1 analogue Plos O0元∞m≤厂 Integrated channel filters Integrated Power Control and Regulation Digital demodulator for improved sensitivity and co-channel 2 high-efficiency switch-mode regulators with 1. 8V and 1.35 V outputs from battery supply Real-time digitised RSSI available to application 3.3V USB pad supply linear regulator Fast AGC for enhanced dynamic range Low-voltage linear regulator for internal digital supply Channel classification for aFh LOw-voltage linear regulator for internal analogue supply Bluetooth Synthesiser with 1.35 V output Fully integrated synthesiser requires no external VCo Power-on-reset detects low supply voltage varactor diode, resonator or loop filter Power management includes digital shutdown and wake-up Compatible with crystals 19.2 MHz to 32 MHz or an external commands with low-power crystal drive for ultra-low power clock 19. 2 MHz to 40 MHz (default 26 MHz Park/Sniff/Hold mode Kalimba DSP Battery Charger Enhanced Kalimba 5 DSP coprocessor Lithium ion /Lithium polymer battery charger with instant-on 120 MHz clock, up to 120 MIPS performance Fast charging support up to 200 mA with no external 24-bit fixed-point core components Single-cycle MAc Higher charge currents using external pass device 24 x 24-bit multiply Supports USB BCv12 CDP, DCP and SDP charger 56-bit accumulate detection d architecture and instructi Charger pre-calibrated by CSR performance over CSR8670 WLCSP PSE compliance 32-bit instructi Design to JIS-C8712/ 8714(batteries) Dual 24-bit data memory a Testing based on IEEE 1725 12 K X 32-bit program RAM including 1 K instruction cache Auxiliary Features for executing out of internal flash Customer application space available 2-bank data Ram Crystal oscillator with built-in digital trimmin DM1 32Kx24-bit Auxiliary ADC and DAC available to applications DM2 32Kx 24-bit Package Option Baseband and software 4.84×484×0.6mm,0.5 mm pitch79- ball WlcSP 16 Mb internal flash Memory protection unit supporting accelerated VM 56 KB internal RAM, enables full-speed data transfer, mixed voice/data and full piconet support Logic for forward error correction, header error control access code correlation, CRC, demodulation, encryption bit stream generation, whitening and transmit pulse shaping Transcoders for A-law, u-law and linear voice via PCM and A-law, u-law and CVsD voice over air Production Information Page 3 of 110 C Cambridge Silicon Radio Limited 2013-2015 CS232427-DSP4 Confidential Information- This Material is Subject to CSR's Non-Disclosure Agreement Www. csr com CSR Functional Block Diagram Serial Flash RAM ART R G B USE 8 PIO UART generaton AUX ADC Controlle Bluetooth Mcdem Bluetooth Baseband Bluctooth Radio BT RF ADC >4 Managemen Shaq ua ity ADC>4 乏 SPKR LN SPKR R High-quality DAC PKR RP MIC BIas b MIG BIAS A VBAT DM1 120MHz MEMS SPDIF PCM/PCM VDD DIG s VDD ANA VDD AUX ByPass 5 (MPUI PCM, SPI S, vitch Praduction Information Page 4 af 110 G Cambridge Silicon Radio Limited 2013-2015. CSR's Non-Disclosure Agreement Cs-232427-DSP4 Confidential Information- This Material is Subject Www. csr. com CSR Document histol RevisionDate Change Reason 13 AUG 13 Original publication of this document 11 NOV 13 Updated Device Terminal Functions and Package Dimensions. 3 05 FEB 15 Updates includ ht vears Full-version of Pre-production Information data sheet Updated Example Application S 20 APR 15 Updates includ ormation Functional block d Device terminal functions Bit-serialiser removed as not supported in firmware ble l/o Ports, Plo Added inductor choice Electrical Characteristi Tape Dimensions D OD Production Information Page 5 of 110 C Cambridge Silicon Radio Limited 2013-2015 CS232427-DSP4 Confidential Information- This Material is Subject to CSR's Non-Disclosure Agreement Www. csr con CSR Status Information The status of this Data Sheet is Production Information. CSR Product Data Sheets pragress according to the following format Advance Information Information for designers concerning CSR product in development. All values specified are the target values of the design Minimum and maximum values specified are only given as guidance to the final specification limits and must not be considered as the final values Engineering Sample Information about initial devices. Devices are untested or partially tested prototypes, their status is described in an Engineering Sample Release Note. All values specified are the target values of the design. Minimum and maximum values specified are only given as guidance to the final specification limits and must not be considered as the final values All detailed specifications including pinouts and electrical specifications may be changed by CSR without notice Pre-production Informati Pinout and mechanical dimension specifications finalised. All values specified are the target values of the design. Minimum and maximum values specified are only given as guidance to the final specification limits and must not be considered as the final values All electrical specifications may be changed by CSR without notice a Production Informatian Final Data Sheet including the guaranteed minimum and maximum limits for the electrical specifications Production Data Sheets supersede all previous document versions O0元 Device Implementation Important Note: As the feature-set of the CSR8675 WLCSP is firmware build-specific, see the relevant software release note for the exact implementation of features on the CSR8675 WLCSP. Life Support Policy and Use in Safety-critical Applications CSR's products are not authorised for use in life-support or safety-critical applications. Use in such applications is done at the sole discretion of the customer CSR will not warrant the use of its devices in such applications CSR Green Semiconductor Products and RoHS Compliance CSR8675 WLCSP devices meet the requirements of Directive 201 1/65/EU of the European Parliament and of the Council on the Restriction of Hazardous Substance(RoHS). CSR8675 WLCSP devices are free from halogenated or antimony trioxide- based flame retardants and other hazardous chemicals. For more information, see CSr's Environmenta/ compliance Statement for CSR Green Semiconductor Products Trademarks, Patents and licences Unless otherwise stated, words and lagos marked with or B)are trademarks registered or owned by Csr plc or its affiliates Bluetooth 3 and the bluetooth logos are trademarks owned by bluetooth O SIG, Inc. and licensed to SR. Other products, services and names used in this document may have been trademarked by their respective owners The publication of this information does not imply that any license is granted under any patent or other rights owned by CSr plc and/or its affiliates CSR reserves the right to make technical changes to its products as part of its development programme While every care has been taken to ensure the accuracy of the contents of this document, CSR cannot accept responsibility for any errors Refertowww.csrsupport.comforcomplianceandconformancetostandardsinformation Production Information Page 6 of 110 C Cambridge Silicon Radio Limited 2013-2015 CS232427-DSP4 Confidential Information- This Material is Subject to CSR's Non-Disclosure Agreement Ww. csr. com CSR Contents Ordering Information .mam maman. 2 Contacts∴ CSR8675 Development Kit Ordering Information Device details∴ Functional Block Diagram,…,"… 1 Package Information 13 1.1 Pinout Diagram 13 1.2 Device Terminal functions 14 1.3 Package Dimensions 1. 4 PCB Design and assembly considerations 21 1.5 Typical Solder Reflow Profile 21 2 System Architecture 3 Bluetooth modem 3.1 RE Ports∴ 3.1.1 BT RF 3.2 RF Receiver O0元 3.2.1 LoW Noise Amplifier 3.2.2 RSSI Analogue to Digital Converter 23 3.3 RF Transmitter 3.3 IQ Modulator 3.32 Power Amplifier…… 3.4 Bluetooth Radio Synthesiser 3.5 Baseband 24 3.5.1 Burst mode controller 24 3.5.2 Physical Layer Hardware Engine 4 Clock Generation 25 4.1 Clock architecture 4.2 Input Frequencies and Ps Key Settings 4.3 External reference clock 4.3 Input: XTAL IN 4.3.2 XTAL_IN Impedance in EXternal Mode 26 4.3.3 Clock Timing Accuracy 4.4 Crystal Oscillator: XTAL_IN and XTAL_OUT .27 4.4.1 Crystal Calibration 4.4.2 Crystal Specificati 5 Bluetooth Stack Microcontroller 28 5. 1 VM Accelerator 6 Kalimba dsp 7 Memory Interface and management ■■』■■■■ 30 7.1 Memory Management Unit 30 7.2 System RAM 7. 3 Kalimba dsP ran 7.4 fLash Memory(16 Mb) 7.5 Serial Quad lO Flash Interface (SQlF) 8 serial interfaces 32 8.1 USB Interface 8.2∪ART| nterface 32 8.2.1 UART Configuration While Reset is Active 8.3 Programming and Debug Interface .33 Production Information Page 7 of 110 C Cambridge Silicon Radio Limited 2013-2015 CS232427-DSP4 Confidential Information- This Material is Subject to CSR's Non-Disclosure Agreement Www. csr con CSR 8.3.1 nstruction Cycle… 8.3.2 Multi-Slave Operati 8. 3.3 SPl-lock 8.4 Software-driven 2C Interface 34 9| interfaces… 9.1 Programmable O Ports, PIO 9.2 Analogue I/o Ports, AlO .36 9.3 Capacitive Touch Sensor 9.3. 1 Capacitive Range Control 9.3.2 Sampling Front End....... 37 9.3.3AD 9.3.4 Digital Signal Conditioning(Digital Processing) 38 9.3.5 Software Signal Conditioning(Firmware) 9.36VM 38 9.4 LED Drivers 10 Audio Interface…n 40 10.1 Audio Input and output 10.2 Audio Codec Interface 41 10.2. 1 Audio Codec block Diagram 42 10.2.2 Codec Set-up 10.2.3ADc 10.2.4 ADC Sample Rate Selection 43 10.2.5 ADC Audio Input gair 43 10.26 ADC Pre-amplifier and ADC Analogue Gain…… 43 10.2.7 ADC Digital Gain 43 10.2.8 ADC Digital IIR Filter..... 10.29DAC 10.2.10 DAC Sample Rate Selection ...... 44 10.2.11 DAC Digital Gain 10.2.12 DAC Analogue Gain 45 10.2. 13 DAC Digital FIR Filter 45 10.2.14|Ec60958| nterface .45 10.2.15 Microphone Input 10.2.16 Digital microphone Inputs 47 10.2.17 Line Input 48 10.2.18 Output Stage 着,a11着,a4 10.2.19 Mono Operation 10.2.20 Side Tone 10.221ntec Digital IIR Filte 51 10.3 PCM1 and pcM2 Interface 52 10.3.1 PCM Interface master/Slave 52 10.3.2 Long Frame Sync 53 10.3.3 Short frame sy 54 10.3.4 Multi-slot Operation 10.3.5 GCI Interface .54 10.3.6 Slots and Sample Formats 0.3. 7 Additional features 10.3.8 PCM Timing Information 10.3. 9 PCM CLK and PCM SYNc Generation 10.3.10 PCM Configuration 10.4 2S1 and 12S2 Interface 11 WLAN Coexistence Interface n…64 Production Information Page 8 of 110 C Cambridge Silicon Radio Limited 2013-2015 CS232427-DSP4 Confidential Information- This Material is Subject to CSR's Non-Disclosure Agreement Www. csr con CSR 12 Power Control and Regulation 12.1 1.8V Switch-mode Regulator 68 12.2 1.35V Switch-mode Regulator 12.3 Inductor Choice 70 12.4 1.8V and 1. 35V Switch-mode Regulators Combined.. 71 12.5 Bypass LDO Linear Regulator 71 12.6 LOW-voltage VDD_DIG Linear Regulator...... 72 12.7 LoW-voltage VDD aUX Linear regulator 72 12.8 Low-voltage VDD_ANA Linear Regulator 12.9 Voltage Regulator Enable 12. 10EXternal Regulators and Power Sequencing 2233 12.11 Reset RST# 12.11.1 Digital Pin States on Reset ..73 1211.2 Status After reset 74 1212Automatic Reset protection 74 13 Battery Charger…, 75 13.1 Battery Charger Hardware Operating Modes ,11. ∴75 13.1.1 Disabled mode 3.1.2 Trickle Charge Mode... ∴76 13.1.3 Fast Charge Mode.. 6 O0元 13.1. 4 Standby Mode 76 13.1.5 Error mode 76 13.2 Battery Charger trimming and calibration 76 13.3 VM Battery Charger Control............ 13.4 Battery charger Firmware and Ps Keys 13.5 External mode 14 Example Application Schematic 78 15 Example Application Using Different Power Supply Configurations 79 16 Electrical Characteristics 16. 1 Absolute Maximum Ratings 16.2 Recoi ting Conditi 16.3 Input/Output Terminal Characteristics 84 D OD 16.3.1 Regulators: Available For External Use 16.3.2 Regulators: For Internal Use Only 16.3.3 Regulator Enable ∴87 16.3.4 Battery Charger 16.3.5 Reset 16.3.6UsB .90 163.7 Clocks 16.3.8 Stereo Codec: Analogue to Digital Converter 16.3. 9 Stereo Codec: Digital to Analogue Converter 6.3.10 Digital 93 16.3. 11 LED Driver Pads 93 16.3.12 Auxiliary adc 16.3.13 Auxiliary DAO… 94 16.4 ESD Protection 16.4.1 USB Electrostatic Discharge Immunity ∴∴95 Power Consumptio 18 CSR Green Semiconductor Products and RoHS Compliance 99 19 Software 100 19.1 On-chip Software 100 19.1.1 Stand-alone CSR8675 WLCSP and Kalimba DSP Applications 100 Production Information Page 9 of 110 C Cambridge Silicon Radio Limited 2013-2015 CS232427-DSP4 Confidential Information- This Material is Subject to CSR's Non-Disclosure Agreement Www. csr con CSR 19.1.2 Bluecore hcl stack 19.2O- chip Software… 101 19.2.1 CSR8675 Development Kit 101 19.2. 2 eXtension Program Support 102 20 Tape and Reel Information..em.a..e. 103 20.1 Tape orientation 103 20.2 Tape Dimensions.... 20.3 Reel Information 104 20.4 Moisture Sensitivity Level...... 104 21 Document references Terms and definitions List of Figures Figure 1.1 Pinout Diagram .13 Figure 2.1 Standard Headset... ,a“aa“aaa Figure 2.2 Extended Headset .. Figure 2.3 Processing 5.1 Channels Figure 2. 4 DDFA Companion Device.. O0元 Figure 3. 1 Simplified Circuit BT_RF Figure4.1 C lock architecture…… 25 Figure 4.2 TCXO Clock Accuracy Figure 6. 1 Kalimba DSP Interface to Internal Functions Figure 7. 1 Serial Quad I/O Flash Interface Figure 8. 1 Universal Asynchronous Receiver Transmitter(UART 32 Figure 8.2 Break Signal 33 Figure 9.1 Capacitive Touch Sensor Block Diagram Figure9.2 LED Equivalent Circuit…… 39 Figure 10.1 Audio Interface Figure 10.2 Audio Codec Input and Output sta 42 Figure 10.3 Audio Input Gain 43 Figure 10. 4 Example Circuit for SPDIF Interface(Co-axial) D OD Figure 10.5 Example Circuit for SPDIF Interface(Optical) Figure 10.6 Microphone Biasing Figure 10.7 Differential Input Figure 10.8 Single-ended Input Figure 10. 9 Speaker Output Figure 10.10 Side Tone Figure 10 11 PCM Interface Master 53 Figure 10.12 PCM Interface Slave..... 53 Figure 10 13 Long Frame Sync(Shown with 8-bit Companded Sample Figure 10 14 Short Frame Sync(shown with 16-bit Sample) Figure 10.15 Multi-slot Operation with 2 Slots and 8-bit Companded Samples 54 Figure 10.16 Gcl Interface Figure 10. 17 16-bit Slot Length and sample Formats.... Figure 10. 18 PCM Master Timing Long Frame Sync Figure 10. 19 PCM Master Timing Short Frame Sync 58 Figure 10. 20 PCM Slave Timing Long Frame Sync 59 Figure 10.21 PCM Slave Timing Short Frame Sync Figure 10. 22 12S Digital Audio Interface Modes Figure 10.23 Digital Audio Interface Slave Timing Figure 10. 24 Digital Audio Interface Master Timing 63 Production Information Page 10 of 110 C Cambridge Silicon Radio Limited 2013-2015 CS232427-DSP4 Confidential Information- This Material is Subject to CSR's Non-Disclosure Agreement Www. csr con 【实例截图】
【核心代码】