实例介绍
【实例简介】
JESD84-B51(emmc_5.1).pdf 规范
NOTICE JEdEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the jedec standards or publications The information included in JEDEC Standards and publications represents a sound approach to product JEDEC organization there are procedures whereby a jEDEC standard or publication may be further o specification and application, principally from the solid state device manufacturer viewpoint. Within the processed and ultimately become an ANSI standard No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should beaddressedtoJedeCattheaddressbeloworrefertowww.jedec.orgunderStandardsandDocuments for alternative contact information Published b OJEDEC Solid State Technology Association 2015 3103 North 1 oth street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material PRICE: Contact JEDEC Printed in the u.s.a All rights PLEASE DONTⅤ FOLATE THE LAW This document is copyrighted by jedec and may not be reproduced without permission For information contact: JEDEC Solid state Technology Association 3103 North 1Oth Street Suite 240 south Arlington, VA22201-2107 orrefertowww.jedec.orgunderStandards-documents/copyrightInformation JEDEC Standard No. 84-B51 EMBEDDED MULTI-MEDIA CARD (eMMC)5.1 DEVICe Contents Page Foreword Introduction Normative reference∴ Terms and definitions 4 System Features e MMC Device and system e MMC System Overview… 5.2 Memory Addressing ··4· 5.3 eMMC Device Overview ······· 5.3.1 Bus p 8 5.3.2 Bus Speed Modes 5.3.3 HS200 Bus Speed Mode 5 5.3.4 HS200 System Block Diagram 16 5.3.5 HS200 Adjustable Sampling Host 5.3.6 HS400 Bus Speed Mode ········ 16 5.3.7 HS400 System Block Diagram 17 eMMC functional description 18 6.1 e MMC Overview 18 6.2 Partition management..…… 19 6.2.1 General .19 6.2.2 Command restrictions 6.2. 3 Extended Partitions Attribute 21 6. 2. 4 Configure partiti .22 6. 2. 5 Access partitions... 25 6.3 Boot .25 6.3.1 Device reset to Pre-idle state 6.3.2 Boot partition 7 6.3.3 Boot operation 28 6.3.4 Alternative boot operation 6.3.5 Access to boot partiti 6.3.6 Boot bus width and data access configuration 6.3.7 Boot partition Write Protection Device identification mode 36 6.4. Device reset 36 6. 4.2 Access mode validation(higher than 2GB of densities) 643 From busy to ready… 37 6.4.4 Device identification process 38 6.5 nterrupt mode….... 38 66 Data transfer mode 6.6 Command sets and extended settings 42 6.6.2 High-speed modes selection 6.6.3 Power class selection 6.6. 4 Bus testing procedure... 6.6.5 Bus Sampling Tuning Concept. 6.6.6 Bus width selection 6.6.7 Data read ∴54 66.8 Data write.…… 56 6. 6.9 Erase 59 6.6.10TRIM61 6.6.1I Sanitize JEDEC Standard no. 84-B51 6.6.12 Discard 62 6.6.1 3 Secure erase 6.6.1 4 Secure Trim 6.6. 15 Write protect management 66 6.6. 16 Extended Security Protocols Pass Through Commands 68 6.6.17 Production State Awareness 6. 6.18 Field Firmware Update 72 6.6. 19 Device lock/unlock operation 66.20 Application- specific commands……… 76 6.6. 21 Sleep(CMD5) 77 6.6.22 Replay Protected Memory Block 78 6. 6.23 ual Data rate mode selection 92 6. 6. 24 Dual Data Rate mode operation .92 66.25 Background Operations…… 6.6.26 Hligh Priority Interrupt (HIPD 6.6.27 Context management 95 6. 6.28 Data Tag Mechanism 6.6.29 Packed Commands 中····· 100 6.6. 30 Exception Events 102 6.6. 31 Cache 103 6.6. 32 Features cross matrix .105 6. 6.33 Dynamic Capacity Management 106 66.34 Large sector size…… 107 6.6 35 Real Time Clock Information 111 6.6.36 Power Off Notification 112 6.6.37 Cache Enhancement barrier 113 6. 6.38 Cache Flushing Policy 114 6.6.39 Command Queuing…… 115 6.6. 40 Secure Write Protect Mode 120 6.7 Clock control .121 6.8 Error conditions 121 6.8.1 CRC and illegal command …121 6.8. 2 Time-out conditions 6.8.3 Read ahead in multiple block read operation 123 69 Mir ·“ 123 6.9. 1 Speed class definition .123 6.9.2 Measurement of the performance……… 124 6.10 Commands 124 6. 10.1 Command types 124 6.10.2 Command format 124 6.10.3 Command classes .125 6. 10.4 Detailed command description 126 6.11 Device state transition table 134 6.12 Responses… 136 6.13DeⅤ Ice status 138 6. 14 Memory array partitioning .142 6.15 lings 144 6. 15.1 Command and response. 114 6. 15.2 Data read 146 6.15. 3 Data write 147 6. 15.4 Bus test procedure timing 151 6.15.5 Boot operation…………………… 152 6. 15.6 Alternative boot operation 153 6. 15.7 Timing Values... 6. 15.8 Timing changes in HS200 and HS400 mode 155 6.15.9 Enhanced Strobe in HS400 Mode 158 JEDEC Standard No. 84-B51 6. 15.10 H/W Reset operation 6. 15.11 Noise filtering timing for H/W Reset 159 6. 15.12 Additional Timing changes in HS400 mode 160 7 Device registe 161 7.1 OCR registe 161 7.2 CID register……………… 162 7.21MID[127:120] 162 7.2.2CBⅩ[113:112]…..… 162 7.2.3OID[11:104]… 162 7.2.4PNM[103:56]… .162 7.2.5PRV[5548] …162 7.2.6PSN[47:16] .162 7,2.7MDI[15:8]… .163 7.28CRC[7 .163 7 CSD register .163 7.3.1 CSD STRUCTURE [127: 126] .165 7.3.2 SPEC VERS[125:122] 165 7.3.3TAAC|19:11 中····· 165 7.3.4NSAC[11:104]…… …165 7.3.5 TRAN SPEED [103: 96 106 7.3.6CCC[95:84] .166 7.3.7 READ BL LEN [83: 80 166 7.3.8 READ BL_ PARTIAL[79]…… 167 7.3.9 WRITE BLK MISALIGN[78]…… 167 7.3.10 READ BLK MISALIGN [77............... 167 7.3.11 DSR IMP[76]...... 167 7.3.12 C SIZE[73:62 168 7.3.13 VDDR CURR MIN 161: 59 and VDD W CURR MIN [55: 53 168 7.3.14 VDDR CURR MAX [58: 56] and VDD W CURR MAX [52: 50]...........168 7.3. 15 C SIZE MULT [49: 47 7.3.16 ERASE GRP SIZE [46: 42 169 7.3.17 ERASE_ GRP MULT[41:37]…… 169 7.3.18 WP GRP SIZE[36:32]…… 7.3. 19 WP GRP ENABLE 31 169 7.3.20 DEFAULT ECC [30: 29 169 7.3.21R2 W FACTOR[28:26] .170 7.3.22 WRITE BL LEN [25: 22 .170 7.3.23 WRITE BL PARTIAL[21] 170 7.3. 24 CONTENT PROT APP [16 170 7.3.25 FILE FORMAT GRP [15] 170 7.3.26COPY[14] .170 7.3.27 PERM WRITE PROT上CT[13]…… 171 73.28 TMP WRITE_ PROTECT[12]…… 17 7.3.29 FILE FORMAT [11: 101 17 7.3.30ECC[9:8] 171 7.3.31CRC[7:1 172 74 Extended CSD register…… 173 7.4.1 EXT SECURITY ERR [505 178 742 S CMD SET[504]1…… .178 7.4.3 HPI FEATURES [5031 178 7.4.4 BKOPS SUPPORT [502] 179 74.5 MAX PACKED READS[501.………… 179 7.4.6 MAX PACKED WRITES [500 179 7.4.7 DATA TAG SUPPORT [499 179 7.4.8 TAG UNIT SIZE [498 179 7.4.9 TAG RES SIZE [497 179 JEDEC Standard no. 84-B51 7.4.10 CONTEXT CAPABILITIES [496 ..………180 7.4.11 LARGE UNIT SIZE MI[495 180 7.4.12 EXT SUPPORT[494 180 7.4.13 SUPPORTED MODES [493 ······· .180 7.4.14 FFU FEATURES [4921 180 7.4. 15 OPERATION CODES TIMEOUT [491]....... .181 74.16 FFU ARO[490-487]… 181 7.4.17 BARRIER SUPPORT [486 1 81 7.4. 18 CMDQ SUPPORT [308 181 7.4. 19 CMDQ DEPTH [307 .182 7.4.20 NUMBER OF FW SECTORS CORRECTLY PROGRAMMED [305-302...........182 7.4.21 VENDOR PROPRIETARY HEALTH REPORT [301-2701 7.4.22 DEVICE LIFE TIME EST TYP B[269 .182 7.4.23 DEVICE LIFE TIME EST TYP A[268 7.4.24 PRE EOL INFO [267.................... 18 7.4.25 OPTIMAL READ SIZE [266 184 7.4.26 OPTIMAL WRITE SIZE [26.5 184 7.4.27 OPTIMAL TRIM UNIT SIZE [264 184 7.4.28 DEVICE VERSION [263-2621 …184 7.4.29 FIRMWAREⅤ ERSION[261-2541]… 185 74.30 CACHE_SIZE[252:2491 185 7.4.31 GENERIC CMD6 TIME [248 185 7.4.32 POWER OFF LONG TIME [247 185 7.4.33 BKOPS STATUS 246 186 7.4.34 CORRECTLY PRG SECTORS NUM 1245: 242 186 7.4.35 INI TIMEOUT AP[241.……… 186 74.36 CACHE FLUSH POLICY [240] 187 7.4.37 TRIM MULT [232 187 7.4.38 SEC FEATURE SUPPORT [231]......... .188 7.4.39 SEC ERASE MULT [230 7.4.40 SEC TRIM MULT [229] 189 7.4.41 BOOT INFO [228 …190 7.4.42 BOOT SIZE MULT [226] 190 7.4.43 ACC SIZE [225 .... 191 7.4.44 HC ERASE GRP SIZE [224 .191 7.4.45 ERASE TIMEOUT MULT [223] .192 7.4.46 REL WR_SEC_C[222]… .192 7.4.47 HC WP GRP SIZE [221] 192 7.4.48 S C VCC[220 and C vCcQ[219 7.4.49 PRODUCTION STATE AWARENESS TIMEOUT [218 193 7.4.50 S A TIMEOUT [217] .194 7.4.51 SLEEP NOTIFICATION TIME [216 .194 74.52 SEC COUNT[215:212] 7.4.53 SECURE WP INFO[211 195 7.4.54 MiN PERF a b ff[210/: 205] and MIN PERF ddr a b ff [235: 234 ··…········ .196 7.4.55 PWR CL ff vvv [203: 200], PWR CL ff Vvv[237: 236], PWR CL DDR ff vvv [239: 238 and PRCL_ DdR ff vvi253]…… 196 7.4.56 PARTITION SWITCH TIME [1991 198 7.4.57 OUT OF INTERRUPT TIME [198].... .198 7.4.58 DRIVER STRENGTH [1971 7.4.59 DEVICE TYPE[196 200 7.4.60 CSD STRUCTURE [194 200 7.4.61 EXT CSD REV [192] 201 7.462 CMD SET[191] 20 7.4.63 CMD SET REV [189 201 7.4.64 POWER CLASS [187 201 JEDEC Standard No. 84-B51 7.4.65HS_ TIMING[1851.… 202 7.4.66 STROBE SUPPORT [184 202 7.4.67 BUS WIDTH [183 74.68 ERASED MEM CONT[181]……… 74.69 PARTITION CONFIG(before BOOT_ CONFIG)[1707 ····· 7.4.70 BOOT CONFIG PROT[178 205 7.4.71 BOOT BUS_ CONDITIONS[177]…… 205 7.4.72 ERASE GROUP DEF [175] 207 7.4.73 BOOT WP STATUS [174 207 7.4.74 BOOT WP[173]… 208 7.4.75 USER WP[171]… 210 7.476 FW CONFIG[169]… 211 7.4.77 RPMB SIZE MULT[I68 211 74.78 WR REL SET[167]… 212 7.4.79 WR REL PARAM 166 213 7.4.80 SANITIZE START[165] 7. 4.81 BKOPS START [164 214 7.4.82 BKOPS EN163 中····· 214 7.4.83 RST n FUNCTION [162] 215 7.4.84 HPI MGMT [161] 215 7.4.85 PARTITIONING SUPPORT [160 216 7.4.86 MAX ENH SIZE MULT [159: 157].... 216 7.4.87 PARTITIONS ATTRIE∪UTE[56]…………… 217 7.4.88 PARTITION SETTING COMPLETED [155] 217 74.89 GP SIZE MULT GPO-GP SIZE MULT GP3 [154: 1431 218 7.4.90 ENH SIZE MULT [142: 140 ···· 219 7.4.91 ENH START ADDR [139: 136 19 74.92 SEC BAD BLK MGMNT[134]…… 219 7.4.93 PRODUCTION STATE AWARENESS [133] 20 7.4.94 TCASE SUPPORT [132] 220 7.4.95 PERIODIC WAKEUP [131] 221 7.4.96 PROGRAM CID CSD DDR SUPPORT [130 221 7.4.97 VENDOR SPECIFIC FIELD [127: 64] 221 7.4.98 NATIVE SECTOR SIZE[63]……… 221 74.99 USE NATTVE SECTOR [62 .222 7.4. 100 DATA SECTOR SIZE [61] 222 7.4.l0 I INI TIM上 OUT EMU[60]……… 222 7.4.102 CLASS6CTRL!59]…… 22 7.4.103 DYNCAP NEEDED [58]........ 222 7.4.104 EXCEPTION EVENTS CTRL [57: 56 223 7. 4.105 EXCEPTION EVENTS STATUS [55: 54 7.4.106 EXT PARTITIONS ATTRIBUTE [53: 52 224 7.4.107 CONTEXT CONF [51: 37. 25 7.4.108 PACKED COMMAND STATUS 36 225 7.4.109 PACKED FAILURE INDEX 35................. 6 7. 4.110 POWER OFF NOTIFICATION [34 226 7. 4.111 CACHE CTRL 33 226 7.4.112 FLUSH CACHE [32] 7 7.4. 113 BARRIER CTRL 311 227 7.4. 114 MODE CONFIG [301 27 7. 4.115 MODE OPERATION CODES [29] 228 74.116 FFU STATUS[26]…………………… 228 7.4.117 PRE LOADING DATA SIZE [25-22]...... 228 7.4. 118 MAX PRE LOADING DATA SIZE [21-18] 7.4. 119 PRODUCT STATE AWARENESS ENABLEMENT [17 229 7.4.120 SECURE REMOVAL TYPE[16 230 【实例截图】
【核心代码】
JESD84-B51(emmc_5.1).pdf 规范
NOTICE JEdEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the jedec standards or publications The information included in JEDEC Standards and publications represents a sound approach to product JEDEC organization there are procedures whereby a jEDEC standard or publication may be further o specification and application, principally from the solid state device manufacturer viewpoint. Within the processed and ultimately become an ANSI standard No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should beaddressedtoJedeCattheaddressbeloworrefertowww.jedec.orgunderStandardsandDocuments for alternative contact information Published b OJEDEC Solid State Technology Association 2015 3103 North 1 oth street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material PRICE: Contact JEDEC Printed in the u.s.a All rights PLEASE DONTⅤ FOLATE THE LAW This document is copyrighted by jedec and may not be reproduced without permission For information contact: JEDEC Solid state Technology Association 3103 North 1Oth Street Suite 240 south Arlington, VA22201-2107 orrefertowww.jedec.orgunderStandards-documents/copyrightInformation JEDEC Standard No. 84-B51 EMBEDDED MULTI-MEDIA CARD (eMMC)5.1 DEVICe Contents Page Foreword Introduction Normative reference∴ Terms and definitions 4 System Features e MMC Device and system e MMC System Overview… 5.2 Memory Addressing ··4· 5.3 eMMC Device Overview ······· 5.3.1 Bus p 8 5.3.2 Bus Speed Modes 5.3.3 HS200 Bus Speed Mode 5 5.3.4 HS200 System Block Diagram 16 5.3.5 HS200 Adjustable Sampling Host 5.3.6 HS400 Bus Speed Mode ········ 16 5.3.7 HS400 System Block Diagram 17 eMMC functional description 18 6.1 e MMC Overview 18 6.2 Partition management..…… 19 6.2.1 General .19 6.2.2 Command restrictions 6.2. 3 Extended Partitions Attribute 21 6. 2. 4 Configure partiti .22 6. 2. 5 Access partitions... 25 6.3 Boot .25 6.3.1 Device reset to Pre-idle state 6.3.2 Boot partition 7 6.3.3 Boot operation 28 6.3.4 Alternative boot operation 6.3.5 Access to boot partiti 6.3.6 Boot bus width and data access configuration 6.3.7 Boot partition Write Protection Device identification mode 36 6.4. Device reset 36 6. 4.2 Access mode validation(higher than 2GB of densities) 643 From busy to ready… 37 6.4.4 Device identification process 38 6.5 nterrupt mode….... 38 66 Data transfer mode 6.6 Command sets and extended settings 42 6.6.2 High-speed modes selection 6.6.3 Power class selection 6.6. 4 Bus testing procedure... 6.6.5 Bus Sampling Tuning Concept. 6.6.6 Bus width selection 6.6.7 Data read ∴54 66.8 Data write.…… 56 6. 6.9 Erase 59 6.6.10TRIM61 6.6.1I Sanitize JEDEC Standard no. 84-B51 6.6.12 Discard 62 6.6.1 3 Secure erase 6.6.1 4 Secure Trim 6.6. 15 Write protect management 66 6.6. 16 Extended Security Protocols Pass Through Commands 68 6.6.17 Production State Awareness 6. 6.18 Field Firmware Update 72 6.6. 19 Device lock/unlock operation 66.20 Application- specific commands……… 76 6.6. 21 Sleep(CMD5) 77 6.6.22 Replay Protected Memory Block 78 6. 6.23 ual Data rate mode selection 92 6. 6. 24 Dual Data Rate mode operation .92 66.25 Background Operations…… 6.6.26 Hligh Priority Interrupt (HIPD 6.6.27 Context management 95 6. 6.28 Data Tag Mechanism 6.6.29 Packed Commands 中····· 100 6.6. 30 Exception Events 102 6.6. 31 Cache 103 6.6. 32 Features cross matrix .105 6. 6.33 Dynamic Capacity Management 106 66.34 Large sector size…… 107 6.6 35 Real Time Clock Information 111 6.6.36 Power Off Notification 112 6.6.37 Cache Enhancement barrier 113 6. 6.38 Cache Flushing Policy 114 6.6.39 Command Queuing…… 115 6.6. 40 Secure Write Protect Mode 120 6.7 Clock control .121 6.8 Error conditions 121 6.8.1 CRC and illegal command …121 6.8. 2 Time-out conditions 6.8.3 Read ahead in multiple block read operation 123 69 Mir ·“ 123 6.9. 1 Speed class definition .123 6.9.2 Measurement of the performance……… 124 6.10 Commands 124 6. 10.1 Command types 124 6.10.2 Command format 124 6.10.3 Command classes .125 6. 10.4 Detailed command description 126 6.11 Device state transition table 134 6.12 Responses… 136 6.13DeⅤ Ice status 138 6. 14 Memory array partitioning .142 6.15 lings 144 6. 15.1 Command and response. 114 6. 15.2 Data read 146 6.15. 3 Data write 147 6. 15.4 Bus test procedure timing 151 6.15.5 Boot operation…………………… 152 6. 15.6 Alternative boot operation 153 6. 15.7 Timing Values... 6. 15.8 Timing changes in HS200 and HS400 mode 155 6.15.9 Enhanced Strobe in HS400 Mode 158 JEDEC Standard No. 84-B51 6. 15.10 H/W Reset operation 6. 15.11 Noise filtering timing for H/W Reset 159 6. 15.12 Additional Timing changes in HS400 mode 160 7 Device registe 161 7.1 OCR registe 161 7.2 CID register……………… 162 7.21MID[127:120] 162 7.2.2CBⅩ[113:112]…..… 162 7.2.3OID[11:104]… 162 7.2.4PNM[103:56]… .162 7.2.5PRV[5548] …162 7.2.6PSN[47:16] .162 7,2.7MDI[15:8]… .163 7.28CRC[7 .163 7 CSD register .163 7.3.1 CSD STRUCTURE [127: 126] .165 7.3.2 SPEC VERS[125:122] 165 7.3.3TAAC|19:11 中····· 165 7.3.4NSAC[11:104]…… …165 7.3.5 TRAN SPEED [103: 96 106 7.3.6CCC[95:84] .166 7.3.7 READ BL LEN [83: 80 166 7.3.8 READ BL_ PARTIAL[79]…… 167 7.3.9 WRITE BLK MISALIGN[78]…… 167 7.3.10 READ BLK MISALIGN [77............... 167 7.3.11 DSR IMP[76]...... 167 7.3.12 C SIZE[73:62 168 7.3.13 VDDR CURR MIN 161: 59 and VDD W CURR MIN [55: 53 168 7.3.14 VDDR CURR MAX [58: 56] and VDD W CURR MAX [52: 50]...........168 7.3. 15 C SIZE MULT [49: 47 7.3.16 ERASE GRP SIZE [46: 42 169 7.3.17 ERASE_ GRP MULT[41:37]…… 169 7.3.18 WP GRP SIZE[36:32]…… 7.3. 19 WP GRP ENABLE 31 169 7.3.20 DEFAULT ECC [30: 29 169 7.3.21R2 W FACTOR[28:26] .170 7.3.22 WRITE BL LEN [25: 22 .170 7.3.23 WRITE BL PARTIAL[21] 170 7.3. 24 CONTENT PROT APP [16 170 7.3.25 FILE FORMAT GRP [15] 170 7.3.26COPY[14] .170 7.3.27 PERM WRITE PROT上CT[13]…… 171 73.28 TMP WRITE_ PROTECT[12]…… 17 7.3.29 FILE FORMAT [11: 101 17 7.3.30ECC[9:8] 171 7.3.31CRC[7:1 172 74 Extended CSD register…… 173 7.4.1 EXT SECURITY ERR [505 178 742 S CMD SET[504]1…… .178 7.4.3 HPI FEATURES [5031 178 7.4.4 BKOPS SUPPORT [502] 179 74.5 MAX PACKED READS[501.………… 179 7.4.6 MAX PACKED WRITES [500 179 7.4.7 DATA TAG SUPPORT [499 179 7.4.8 TAG UNIT SIZE [498 179 7.4.9 TAG RES SIZE [497 179 JEDEC Standard no. 84-B51 7.4.10 CONTEXT CAPABILITIES [496 ..………180 7.4.11 LARGE UNIT SIZE MI[495 180 7.4.12 EXT SUPPORT[494 180 7.4.13 SUPPORTED MODES [493 ······· .180 7.4.14 FFU FEATURES [4921 180 7.4. 15 OPERATION CODES TIMEOUT [491]....... .181 74.16 FFU ARO[490-487]… 181 7.4.17 BARRIER SUPPORT [486 1 81 7.4. 18 CMDQ SUPPORT [308 181 7.4. 19 CMDQ DEPTH [307 .182 7.4.20 NUMBER OF FW SECTORS CORRECTLY PROGRAMMED [305-302...........182 7.4.21 VENDOR PROPRIETARY HEALTH REPORT [301-2701 7.4.22 DEVICE LIFE TIME EST TYP B[269 .182 7.4.23 DEVICE LIFE TIME EST TYP A[268 7.4.24 PRE EOL INFO [267.................... 18 7.4.25 OPTIMAL READ SIZE [266 184 7.4.26 OPTIMAL WRITE SIZE [26.5 184 7.4.27 OPTIMAL TRIM UNIT SIZE [264 184 7.4.28 DEVICE VERSION [263-2621 …184 7.4.29 FIRMWAREⅤ ERSION[261-2541]… 185 74.30 CACHE_SIZE[252:2491 185 7.4.31 GENERIC CMD6 TIME [248 185 7.4.32 POWER OFF LONG TIME [247 185 7.4.33 BKOPS STATUS 246 186 7.4.34 CORRECTLY PRG SECTORS NUM 1245: 242 186 7.4.35 INI TIMEOUT AP[241.……… 186 74.36 CACHE FLUSH POLICY [240] 187 7.4.37 TRIM MULT [232 187 7.4.38 SEC FEATURE SUPPORT [231]......... .188 7.4.39 SEC ERASE MULT [230 7.4.40 SEC TRIM MULT [229] 189 7.4.41 BOOT INFO [228 …190 7.4.42 BOOT SIZE MULT [226] 190 7.4.43 ACC SIZE [225 .... 191 7.4.44 HC ERASE GRP SIZE [224 .191 7.4.45 ERASE TIMEOUT MULT [223] .192 7.4.46 REL WR_SEC_C[222]… .192 7.4.47 HC WP GRP SIZE [221] 192 7.4.48 S C VCC[220 and C vCcQ[219 7.4.49 PRODUCTION STATE AWARENESS TIMEOUT [218 193 7.4.50 S A TIMEOUT [217] .194 7.4.51 SLEEP NOTIFICATION TIME [216 .194 74.52 SEC COUNT[215:212] 7.4.53 SECURE WP INFO[211 195 7.4.54 MiN PERF a b ff[210/: 205] and MIN PERF ddr a b ff [235: 234 ··…········ .196 7.4.55 PWR CL ff vvv [203: 200], PWR CL ff Vvv[237: 236], PWR CL DDR ff vvv [239: 238 and PRCL_ DdR ff vvi253]…… 196 7.4.56 PARTITION SWITCH TIME [1991 198 7.4.57 OUT OF INTERRUPT TIME [198].... .198 7.4.58 DRIVER STRENGTH [1971 7.4.59 DEVICE TYPE[196 200 7.4.60 CSD STRUCTURE [194 200 7.4.61 EXT CSD REV [192] 201 7.462 CMD SET[191] 20 7.4.63 CMD SET REV [189 201 7.4.64 POWER CLASS [187 201 JEDEC Standard No. 84-B51 7.4.65HS_ TIMING[1851.… 202 7.4.66 STROBE SUPPORT [184 202 7.4.67 BUS WIDTH [183 74.68 ERASED MEM CONT[181]……… 74.69 PARTITION CONFIG(before BOOT_ CONFIG)[1707 ····· 7.4.70 BOOT CONFIG PROT[178 205 7.4.71 BOOT BUS_ CONDITIONS[177]…… 205 7.4.72 ERASE GROUP DEF [175] 207 7.4.73 BOOT WP STATUS [174 207 7.4.74 BOOT WP[173]… 208 7.4.75 USER WP[171]… 210 7.476 FW CONFIG[169]… 211 7.4.77 RPMB SIZE MULT[I68 211 74.78 WR REL SET[167]… 212 7.4.79 WR REL PARAM 166 213 7.4.80 SANITIZE START[165] 7. 4.81 BKOPS START [164 214 7.4.82 BKOPS EN163 中····· 214 7.4.83 RST n FUNCTION [162] 215 7.4.84 HPI MGMT [161] 215 7.4.85 PARTITIONING SUPPORT [160 216 7.4.86 MAX ENH SIZE MULT [159: 157].... 216 7.4.87 PARTITIONS ATTRIE∪UTE[56]…………… 217 7.4.88 PARTITION SETTING COMPLETED [155] 217 74.89 GP SIZE MULT GPO-GP SIZE MULT GP3 [154: 1431 218 7.4.90 ENH SIZE MULT [142: 140 ···· 219 7.4.91 ENH START ADDR [139: 136 19 74.92 SEC BAD BLK MGMNT[134]…… 219 7.4.93 PRODUCTION STATE AWARENESS [133] 20 7.4.94 TCASE SUPPORT [132] 220 7.4.95 PERIODIC WAKEUP [131] 221 7.4.96 PROGRAM CID CSD DDR SUPPORT [130 221 7.4.97 VENDOR SPECIFIC FIELD [127: 64] 221 7.4.98 NATIVE SECTOR SIZE[63]……… 221 74.99 USE NATTVE SECTOR [62 .222 7.4. 100 DATA SECTOR SIZE [61] 222 7.4.l0 I INI TIM上 OUT EMU[60]……… 222 7.4.102 CLASS6CTRL!59]…… 22 7.4.103 DYNCAP NEEDED [58]........ 222 7.4.104 EXCEPTION EVENTS CTRL [57: 56 223 7. 4.105 EXCEPTION EVENTS STATUS [55: 54 7.4.106 EXT PARTITIONS ATTRIBUTE [53: 52 224 7.4.107 CONTEXT CONF [51: 37. 25 7.4.108 PACKED COMMAND STATUS 36 225 7.4.109 PACKED FAILURE INDEX 35................. 6 7. 4.110 POWER OFF NOTIFICATION [34 226 7. 4.111 CACHE CTRL 33 226 7.4.112 FLUSH CACHE [32] 7 7.4. 113 BARRIER CTRL 311 227 7.4. 114 MODE CONFIG [301 27 7. 4.115 MODE OPERATION CODES [29] 228 74.116 FFU STATUS[26]…………………… 228 7.4.117 PRE LOADING DATA SIZE [25-22]...... 228 7.4. 118 MAX PRE LOADING DATA SIZE [21-18] 7.4. 119 PRODUCT STATE AWARENESS ENABLEMENT [17 229 7.4.120 SECURE REMOVAL TYPE[16 230 【实例截图】
【核心代码】
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