实例介绍
【实例简介】
PCI Express Card Electromechanical Specification Revision 3.0； PCIE CEM 3.0标准； PCI Express Add-In Card、Mother Board标准规范。
Contents l。 INTRODUCTION,11 1. 1. TERMS AND DEFINITIONS 12 2. REFERENCE DOCUMENTS 13 1. 3. SPECIFICATION CONTENTS .14 1.4. OBJECTIVES.……………14 15. ELECTRICAL OVERVIEW 15 16. MECHANICAL OVERVIEW …·····················:···“·············· 16 1.7. 150WOVERVIE W 18 1. 8. 225WAND 300 W ADD-IN CARD OVERVIEW 9. SYSTEM POWER DELIVERY REQUIREMENTS ……………20 2。 AUXILIARY SIGNALS 21 2.1. REFERENCE CLOCK 22 2.1.1. Low Voltage Swing, Differential Clocks 2. 1.2. Spread Spectrum Clocking (SSC) 23 2.1.3. REFCLK AC Specifications.…… 24 2.1.4. REFCLK Phase Jitter Specification for 2.5 GT/s Signaling Support. 28 2.1.5. REFCLK Phase Jitter Specification for 5.0 GT/s Signaling Support .29 2.1.6. REFCLK Phase Jitter Specification for 8.0 GT/s Signaling Support.....29 2.2. PERST井 SIGNAL..……29 2. 1. Initial Power-Up(G3 to SO) 30 2.2.2. Power Management States (so to S3/S4 to so) 30 223. Power down 32 2.3.WAKE# SIGNAL∴ 33 2. 4. SMBUS(OPTIONAL) 37 2.4.1. Capacitive Load of High-power SMBus Lines 37 2.4.2. Minimum Current Sinking Requirements for SMBus Devices 37 2.4.3. SMBus "Back Powering "Considerations ∴37 4.4 Power-on reset 38 2.5. JTAG PINS (OPTIONAL) …,38 26. AUXILIARY SIGNAL PARAMETRIC SPECIFICATIONS………,…… 39 2,.6.1. DC Specifications……… 39 2.6.2. AC Specifications .40 3. HOT INSERTION AND REMOVAL……41 3.1. SCOPE 41 32. PRESENCE DETECT 41 4. ELECTRICAL 4.1. POWER SUPPLY REQUIREMENTS... 43 4.2. POWER CONSUMPTION 43. POWER BUDGETING CAPABILITY 46 4.4. POWER SUPPLY SEQUENCING 46 45. POWER SUPPLY DECOUPLING 47 4.6. ELECTRICAL TOPOLOGIES AND LINK DEFINITIONS..................47 4.0.1.7 apologies.… .-47 4.6.2. Link definition 419 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 47. ELECTRICAL BUDGETS .50 4.7.1. AC Coupling Capacitors 4.7.2. Insertion Loss values (voltage transfer Function) 4.7.3 Jitter values 4.7.4. Crosstalk 4.7.5. Lane-to-Lune skew 54 4.7.6. Transmitter equalization .54 4.7.7.Sk thin the differential po 55 4.7.8. Differential Data Trace Impedance 55 4.7.9. Diferential Data Trace Propagation delay...……….56 48. EYE DIAGRAMS AT THE ADD-IN CARD INTERFACE 56 4.8.1. Add-in Card Transmitter Path Compliance Eye Diagram at 2.5 G77s 6 4.8.2. Add-in Card Transmiller Pach Compliance Eye Diagrams al 5.0 GT/s.....57 4.8.3.Ad- in Card Transmitter Path Compliance Eye Diagrams at8.0G7s…………59 4.8.4. Add-in Card Minimum receiver Path Sensitivity requirements at 2.5 GT/s.....60 4.8.5. Add-in Card Minimum Receiver Path Sensitivity Requirements at 5.0GT/s 61 4.8.6. Add-in Card Minimum receiver Path Sensitivity requirements at 8.0 GT/s....62 4.8.7. System Board Transmitter Path Compliance eye diagram at 2.5 GT/s 4.8.8. System board Transmitter Path Compliance eve Diagram at 5.0G77s .66 4.8.9. Syslem Board Transmiller Pach compliance Eve Diagram al8.0 GT/s......09 4.8.10. System Board Minimum Receiver Path Sensitivity Requirements at 2.5 GT/s...72 4.8.11. System board Minimum Receiver Path Sensitivity Requirements at 5.0 GT/s 4.8.12. System Board Minimum Receiver Path Sensitivity requirements at 8.0 GT/s....7 5. 150W.225W. 5.1. 150 ADD-IN CARD POWER-UP SEQUENCING ·。垂 …79 5.2. 225 AND 300 W ADD-IN CARD POWER-UP SEQUENCING 6. CARD CONNECTOR SPECIFICATION. 6.1. CONNECTOR PINOUT 86 6.2. CONNECTOR INTERFACE DEFINITIONS 89 6.3. SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES 94 6.3./. Signal Integrity Req 94 6.3.2. Signal Integrity Requirements and Test Procedures for 2.5 GT/S Support.....94 6.3.3. Signal Inlegrily Requiremenls and Test Procedures for 5.0 GT/s Support.....97 6.3.3.1 Test Fixture Requirements……… 99 6.3.4. Signal Integrity Requirements and Test Procedures for 8.0 GT/s Support l00 6.3.4./ Test Fixture Requirements 101 6. 4. CONNECTOR ENVIRONMENTAL AND OTHER REQUIREMENTS 101 6. 4./. Environmental Requirements 01 6.4.2. Mechanical requirements …1703 6. 4.3. Current Ruling Requirement 104 6.4.4. Additional considerations 04 7. PCI EXPRESS 2X3 AUXILIARY POWER CONNECTOR DEFINITION.... 106 7. 1. 6-POSITION POWER CONNECTOR SYSTEM PERFORMANCE REQUIREMENTS.106 7. 2. 6-POSITION PCB HEADER ···· ∴106 7.2.1. 6-Position R/A Thru-llole PcB Leader Assembly .106 7.2.2. 6-Position R/A Thru-Hole Header recommended PCB Footprint 08 7.2.3. 6-Position R/A SMT PCB Header Assembly 109 7.2.4. R/A SMT Header recommended PCB Footprint 110 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 73. 6-POSITION CABLE ASSEMBLY 11 7. 4. CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE).112 7. 5. 6-POSITION POWER CONNECTOR SYSTEM PIN ASSIGNMENT .................................113 76. ADDITIONAL CONSIDERATIONS 音面面 114 8. PCI EXPRESS 2X4 AUXILIARY POWER CONNECTOR DEFINITION..115 8.1.2X4 AUXILIARY POWER CONNECTOR PERFORMANCE REQUIREMENTS………118 8. 2. 2X4 RECEPTACLE 118 8.2.1. Connector Drawing 118 8.2.2,. PCB Foolprin.......120 8. 3. CABLE ASSEMBLY ········+····················“· 121 8.4. CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE).123 8. 5. 2X4 AUXILIARY POWER CONNECTOR SYSTEM PIN ASSIGNMENT .124 8.6. ADDITIONAL CONSIDERATIONS 126 9. ADD-IN CARD FORM FACTORS AND IMPLEMENTATION ..s..127 9.1. ADD-IN CARD FORM FACTORS …127 9.2. CONNECTOR AND ADD-IN CARD LOCATIONS......................146 93. CARD INTEROPERABILITY +++++· 155 9. 4. I50W-ATX THERMAL MANAGEMENT 156 10. PCI EXPRESS 225 W/300W ADD-IN CARD THERMAL AND ACOUSTIC MANAGEMIENT ●D鲁看●·b●●e●e自。e 157 10.1. INLET TEMPERATURE ·垂垂 157 102. CARD THERMAL CHARACTERIZATION PROCEDURE 158 103. ACOUSTIC MANAGEMENT 162 10.3./. Background and Scope 62 103.2. Card Acoustic Characterization procedure 162 10.33. Acoustic recommendations and Guidelines.......................163 A. INSERTION LOSS VALUES (VOLTAGE TRANSFER FUNCTION) (INFORMATIONAL ONLY).O .. B. 8.0 GT/ 11. ACKNOWLEDGEMENTS 168 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 Figures FIGURE 2-2: EXAMPLE CURRENT MODE REFERENCE CLOCK SOURCE TERMINATION 23 FIGURE 2-3 SINGLE-ENDED MEASUREMENT POINTS FOR ABSOLUTE CROSS POINT AND SWING .25 FIGURE 2-4: SINGLE-ENDED MEASUREMENT POINTS FOR DELTA CROSS POINT 26 FIGURE 2-5 SINGLE-ENDED MEASUREMENT POINTS FOR RISE AND FALL TIME MATCHINO… 26 FIGURE 2-6: DIFFERENTIAL MEASUREMENT POINTS FOR DUTY CYCLE AND PERIOD 26 FIGURE 2-7: DIFFERENTIAL MEASUREMENT POINTS FOR RISE AND FALL TIME 27 FIGuRE 2-8: DIFFERENTIAL MEASUREMENT POINTS FOR RINGBACK..........27 FIGURE 2-9: REFERENCE CLOCK SYSTEM MEASUREMENT POINT AND LOADING ......27 FIGURE2-10: POWER UP.…..…………30 FIGURE 2-11: POWER MANAGEMENT STATES .31 FIGURE 2-12: OUT-OF-TOLERANCE THRESHOLD WINDOWS...............32 FIGuRE 2-13: POWER DOWN 33 FIGURE 2-14: WAKE# RISE AND FALL TIME MEASUREMENT POINTS. ..............................40 FIgure3-1: PRESENCE DETECT IN A HOT-PLUG ENVIRONMENT 42 FIGURE 4-1: PCI EXPRESS ON THE SY STEM BOARD 48 FIGURE 4-2: PCI EXPRESS CONNECTOR ON SYSTEM BOARD WITH AN ADD-IN CARD. 48 FIGURE 4-3: PCI EXPRESS CONNECTOR ON A RISER CARD WITH AN ADD-IN CARD.49 FIGURE4-4:LⅣ NK DEFINITION FOR TWO COMPONENTS..…..…………50 FIGURE 4-5: JITTER BUDGET FIGURE 4-6: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE DIAGRAM FIGURE 4-7: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE DIAGRAM 9 FIGURE 4-8: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR ADD-IN CARD RECEIVER PATH COMPLIANCE .61 FIGURE 4-9: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR ADD-IN CARD RECEIVER PATH COMPLIANCE 62 FIGURE 4-10: SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DIAGRAM 65 FIGURE 4-11: TWO PORT MEASUREMENT FUNCTIONAL BLOCK DIAGRAM......66 FIGURE 4-12. SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DⅠ AGRAM 68 FIGURE 4-13: TWO PORT MEASUREMENT FUNCTIONAL BLOCK DIAGRAM FIGURE 4-14: SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DIAGRAM 71 FIGURE 4-15: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR SYSTEM BOARD RECEIVER PATH COMPLIANCE 74 FIGURE 5-1: PCI EXPRESS 1SOW-ATX POWER-UP SEQUENCE 79 FIGURE 6-1: CONNECTOR FORM FACTOR........................90 FIGURE 6-2: RECOMMENDED FOOTPRINT ...... 91 FIGURE 6-3: ADD-IN CARD EDGE-FINGER DIMENSIONS …······· 92 FIGURE 6-4: ILLUSTRATION OF ADJACENT PAIRS ……97 FIGURE 6-5: CONTACT RESISTANCE MEASUREMENT POINTS 102 FIGURE 7-1: 6-POSITION R/A THRU-HOLE PCB HEADER 107 FIGURE 7-2:6-POSITION R/A THRU-HOLE HEADER RECOMMENDED PCB FOOTPRINT 108 FIGURE 7-3: R/A SMT PCB HEADER. ............................................................................109 FIGURE 7-4: SMT HEADER RECOMMENDED PCB FOOTPRINT 110 FIGURE 7-5: CABLE CONNECTOR HOUSING ……………111 6 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 FIGURE 7-6: CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE). .12 FIGURE 7-7: 150W-ATX POWER CONNECTOR 13 figure 8-1:2X 4 PLUG MATING WITHA2X4 RECEPTACLE 15 FIGuRE 8-2: 2X 3 PLUG MATING Witha 2X4 RECEPTACLE...............116 FIguRE 8-3: 2X 4 PLUG IS PHYSICALLY PREVENTED FROM MATING WITHA2X3 RECEPTACLE .117 FIGuRE 8-4: 2X4R/A THROUGH-HOLE RECEPTACLE DRAWING.........119 FIGURE 8-5: 2X4R/A THROUGH-HOLE RECPTACLE RECOMMENDED PCB FOOtPrint120 FIGuRE 8-6: CABLE PLUG CONNECTOR HOUSING ..............................................................121 FIGURE 8-7: MODULAR PLUG CONNECTOR HOUSING (ALL DIMENSIONS IN MM INCHES」)… l22 FIGURE 8-8: CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE)…,,,…,…,…,…,…………………………123 FIGURE 8-9: 2X4 AUXILIARY POWER CONNECTOR PLUG SIDE PIN-OUT ······· …124 FIGURE 8-10: 2X4 AUXILIARY POWER CONNECTOR RECEPTACLE SIDE PIN-OUT. 124 FIGURE8-11:23 AUXILⅠ ARY POWER CONNECTOR PIN-OUT.……………125 FIGurE 9-1: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITHOUT THE V/O BRACKET…………………128 FIGURE 9-2: CHASSIS INTERFACE ZONES ON RIGHT/ EAST EDGE OF ADD-IN CARD . 129 FIGURE 9-3: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITH THE IO BRACKET AND CARD RETAINER 130 FIgurE 9-4: ADDITIONAL FEATURE AND KEEPOUTS FOR A HIGH MASS CARD 132 Figure 9-5: STANDARD ADD-IN CARD I/O BRACKET 134 FIGURE 9-6 LOW PROFILE PCI EXPRESS ADD-IN CARD WITHOUT THE 10 BRACKET136 FIGurE 9-7: CHASSIS INTERFACE ZONE ON RIGHT EAST EDGE OF LOW PROFILE ADD IN CARD.…… 137 Figure 9-8: LOW PROFILE PCI EXPRESS ADD-IN CARD WITH THE IO BRACKET..138 FIGURE99: LOW PROFILE JO BRACKET……1139 FIGURE 9-10: FULL HEIGHT IO BRACKET FOR LOW PROFILE CARDS 140 FIGurE 9-11: PCI EXPRESS DUAL-SLOT ADD-IN CARD DIMENSIONAL DRAWING..141 FiGurE 9-12: PCI EXPRESS TRIPLE-SLOT ADD-IN CARD DIMENSIONAL DRAWING. 142 FIGurE 9-13: DETAILED TWO-SLOT I/O BRACKET DESIGN................143 FIGURE 9-14: TWO-SLOT IO BRACKET EXAMPLE (ISOMETRIC VIEW) 143 FIGURE9-15: DETAILED THREE- SLOT IO BRACKET DESIGN.………144 FIGURE 9-16: THREE-SLOT IO BRACKET EXAMPLE (ISOMETRIC VIEW 145 FIGuRE 9-17. EXAMPLE OF A PC SYSTEM IN MICROATX FORM FACTOR 146 Figure 9-18: INTRODUCTION OF A PCI EXPRESS CONNECTOR IN A MICROATX SYSTEM …147 FIgurE 9-19: MORE PCI EXPRESS CONNECTORS ARE INTRODUCED ON A MICROATX SYSTEM BOARD 148 FIGURE 9-20: PCI EXPRESS CONNECTOR LOCATION IN A MICROATX SYSTEM WITH ONE PCIEXPRESS CONNECTOR...............149 FIGURE 9-21: PCI EXPRESS CONNECTOR LOCATION IN A MICROATX SYSTEM WITH TWO PCI EXPRESS CONNECTORS 150 FIGurE 9-22: STANDARD HEIGHT CONNECTOR OPENING IN CHASSIS.......151 FiGure 9-23: LOW PROFILE CONNECTOR OPENING IN CHASSIS 152 FIGuRE 9-24: CHASSIS IO CABLE KEEPOUT 153 FIGURE 9-25: IMPACT OF STRUCTURAL SHAPES IN THE SYSTEM 154 FIGuRE 9-26: CARD ASSEMBLED IN CONNECTOR 155 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 FIGURE 10-1: EXAMPLE OF HIGH-POWER CARD SHOWING TEMPERATURE SENSOR PLACEMENTS AT THE THERMAL SOLUTION INLET 157 FIGURE 10-2: THERMAL CHARACTERIZATION FIXTURE DUAL-SLOT VERSION... 159 FIGURE 10-3: THERMAL CHARACTERIZATION FIXTURE- TRIPLE-SLOT VERSION.160 FIGURE 10-4: THERMAL CHARACTERIZATION FIXTURE- TANDEM DUAL-SLOT VERSION 161 FIGURE A-l: EXAMPLE INTERCONNECT TERMINATED AT THE CONNECTOR INTERFACE………… 164 FIGURE A-2: INSERTION LOSS BUDGETS 165 8 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 Tables TABLE 1-1: POWER SUPPLY RAIL REOUTREMENTS 20 TABLE 2-1: REFCLK DC SPECIFICATIONS AND AC TIMING REQUIREMENTS 24 TABLE 2-2: MAXIMUM ALLOWED PHASE JITTER WHEN APPLIED TO FIXED FILTER CHARACTERISTIC ··· 29 TABLE 2-3: AUXILIARY SIGNAL DC SPECIFICATIONS-PERST# WAKE# AND SMBUS.. 39 TABLE 2-4: POWER SEQUENCING AND RESET SIGNAL TIMINGS 40 TABLE 4-1: POWER SUPPLY RAIL REQUIREMENTS ·.·“···.··.······ 44 TABLE 4-2. TOTAL SYSTEM JITTER BUDGET FOR 2,5GT/S SIGNALING . ....................52 TABLE 4-3: ALLOCATION OF INTERCONNECT JITTER BUDGET FOR 2.5 GT/S SIGNALING. 52 TABLE 4-4: TOTAL SYSTEM JITTER BUDGET FOR 5.0 GT/S SIGNALING TABLE 4-5: ALLOWABLE INTERCONNECT LANE-TO-LANE SKEW 4 TABLE 4-6: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS at25 GT/S 56 TABLE 4-7: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS At 50 GT/S AND 3. 5 DB DE-EMPHASIS 57 TABLE 4-8: ADD-IN CARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING at3.5 DB DE-EMPHASIS 58 TABLE 4-9: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 5.0 GT/S AT 6.0 DB DE-EMPHASIS ·;垂 ∴58 TABLE 4-10: ADD-IN CARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING AT 6.0 DB DE-EMPHASIS TABLE 4-11: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS at8OGT/S TABLE 4-12: ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT2.5GT/S 垂·· 60 TABLE 4-13: ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT50GT/S 61 TABLE 4-14: LONG CHANNEL ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 8.0 GT/S 63 TABLE 4-15: SHORT CHANNEL ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 8.0GT/S 64 TABLE 4-16: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT2.5GT/S ·· 65 TABLE 4-17: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 50GT/S ····· ∴68 TABLE 4-18: SYSTEM BOARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING 69 TABLE 4-19: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT8.0 GT/S WITH IDEAL ADAPTIVE TX EQUALIZATION 71 TABLE 4-20: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 2.5GT/S ·:·+············+·············;············ TABLE 4-21: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 5.0 GT/S FOR A LINK THAT OPERATES WITH 3.5 DB DE-EMPHASIS. ............73 TABLE 4-22: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 5.GT/S FOR A LINK THAT OPERATES WITH 6.0 DB DE-EMPHASIS 74 TABLE 4-23: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT8.0GT/S.…………… 76 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 TABLE 5-1: PCI EXPRESS 300 W CARD WITH ONE 2X 4 AND ONE 2X 3 CONNECTOR) PERMITTED INITIAL POWER DRAW TABLE 5-2: PCI EXPRESS 300W CARD (WITH THREE 2X 3 CONNECTORS) PERMITTED INITIAL POWER DRAW 82 TABLE 5-3: PCI EXPRESS 225 W CARD WITH ONE 2X 4 CONNECTOR) PERMITTED INITIAL POWER DRAW 83 TABLE 5-4: PCI EXPRESS 225 W CARD ( WITH TWO2X3 CONNECTORS) PERMITTED TABLE 5-5: PCI EXPRESS 225 W CARD (WITH ONE 2 X 3 AND ONE 2 X 4 CONNECTOR).8% INITIAL POWER DRAW PERMITTED INITIAL POWER DRAW 84 TAbLE 6-1: PCI EXPRESS CONNECTORS PINOUT 86 TABLE 6-2: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 2.5/S SUPPORT ∴…95 TABLE 6-3: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 5.0 GT/S SUPPORT 垂··,·垂 TABLE 6-4: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 8.0 GT/S SUPPORT 100 TABLE 6-5: TEST DURATIONS .102 TABLE 6-6: MECHANICAL TEST PROCEDURES AND REQUIREMENTS 103 TABLE 6-7: END OF LIFE CURRENT RATING TEST SEQUENCE............104 TABLE68: ADDITIONAL REQUIREMENTS.….…,………,,……,,…… 104 TABLE 7-1: 150W-ATX POWER CONNECTOR PIN-OUT 113 TABLE 7-2: PCI EXPRESS 15OW-ATX POWER CONNECTOR ADDITIONAL REQUIREMENTSI14 table 8-1: 2X4 AUXILIARY POWER CONNECTOR PIN-OUT ASSIGNMENT ,125 table 8-2: SENSE PINS DECODING BY A GRAPHICS card 125 table 8-3: 2X3 PLUg To 2X 4 RECEPTACLE PIN MAPPING 126 TABLE 8-4: ADDITIONAL REQUIREMENTS 126 TABLE9-1:ADD-Ⅰ N CARD SIZES∴ 127 TaBLE 9-2: CARD INTEROPERABILITY 155 TABLE A-1: ALLOCATION OF INTERCONNECT PATH INSERTION LOSS BUDGET FOR 2.5 GT/S SIGNALING 165 10 【实例截图】
【核心代码】
PCI Express Card Electromechanical Specification Revision 3.0； PCIE CEM 3.0标准； PCI Express Add-In Card、Mother Board标准规范。
Contents l。 INTRODUCTION,11 1. 1. TERMS AND DEFINITIONS 12 2. REFERENCE DOCUMENTS 13 1. 3. SPECIFICATION CONTENTS .14 1.4. OBJECTIVES.……………14 15. ELECTRICAL OVERVIEW 15 16. MECHANICAL OVERVIEW …·····················:···“·············· 16 1.7. 150WOVERVIE W 18 1. 8. 225WAND 300 W ADD-IN CARD OVERVIEW 9. SYSTEM POWER DELIVERY REQUIREMENTS ……………20 2。 AUXILIARY SIGNALS 21 2.1. REFERENCE CLOCK 22 2.1.1. Low Voltage Swing, Differential Clocks 2. 1.2. Spread Spectrum Clocking (SSC) 23 2.1.3. REFCLK AC Specifications.…… 24 2.1.4. REFCLK Phase Jitter Specification for 2.5 GT/s Signaling Support. 28 2.1.5. REFCLK Phase Jitter Specification for 5.0 GT/s Signaling Support .29 2.1.6. REFCLK Phase Jitter Specification for 8.0 GT/s Signaling Support.....29 2.2. PERST井 SIGNAL..……29 2. 1. Initial Power-Up(G3 to SO) 30 2.2.2. Power Management States (so to S3/S4 to so) 30 223. Power down 32 2.3.WAKE# SIGNAL∴ 33 2. 4. SMBUS(OPTIONAL) 37 2.4.1. Capacitive Load of High-power SMBus Lines 37 2.4.2. Minimum Current Sinking Requirements for SMBus Devices 37 2.4.3. SMBus "Back Powering "Considerations ∴37 4.4 Power-on reset 38 2.5. JTAG PINS (OPTIONAL) …,38 26. AUXILIARY SIGNAL PARAMETRIC SPECIFICATIONS………,…… 39 2,.6.1. DC Specifications……… 39 2.6.2. AC Specifications .40 3. HOT INSERTION AND REMOVAL……41 3.1. SCOPE 41 32. PRESENCE DETECT 41 4. ELECTRICAL 4.1. POWER SUPPLY REQUIREMENTS... 43 4.2. POWER CONSUMPTION 43. POWER BUDGETING CAPABILITY 46 4.4. POWER SUPPLY SEQUENCING 46 45. POWER SUPPLY DECOUPLING 47 4.6. ELECTRICAL TOPOLOGIES AND LINK DEFINITIONS..................47 4.0.1.7 apologies.… .-47 4.6.2. Link definition 419 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 47. ELECTRICAL BUDGETS .50 4.7.1. AC Coupling Capacitors 4.7.2. Insertion Loss values (voltage transfer Function) 4.7.3 Jitter values 4.7.4. Crosstalk 4.7.5. Lane-to-Lune skew 54 4.7.6. Transmitter equalization .54 4.7.7.Sk thin the differential po 55 4.7.8. Differential Data Trace Impedance 55 4.7.9. Diferential Data Trace Propagation delay...……….56 48. EYE DIAGRAMS AT THE ADD-IN CARD INTERFACE 56 4.8.1. Add-in Card Transmitter Path Compliance Eye Diagram at 2.5 G77s 6 4.8.2. Add-in Card Transmiller Pach Compliance Eye Diagrams al 5.0 GT/s.....57 4.8.3.Ad- in Card Transmitter Path Compliance Eye Diagrams at8.0G7s…………59 4.8.4. Add-in Card Minimum receiver Path Sensitivity requirements at 2.5 GT/s.....60 4.8.5. Add-in Card Minimum Receiver Path Sensitivity Requirements at 5.0GT/s 61 4.8.6. Add-in Card Minimum receiver Path Sensitivity requirements at 8.0 GT/s....62 4.8.7. System Board Transmitter Path Compliance eye diagram at 2.5 GT/s 4.8.8. System board Transmitter Path Compliance eve Diagram at 5.0G77s .66 4.8.9. Syslem Board Transmiller Pach compliance Eve Diagram al8.0 GT/s......09 4.8.10. System Board Minimum Receiver Path Sensitivity Requirements at 2.5 GT/s...72 4.8.11. System board Minimum Receiver Path Sensitivity Requirements at 5.0 GT/s 4.8.12. System Board Minimum Receiver Path Sensitivity requirements at 8.0 GT/s....7 5. 150W.225W. 5.1. 150 ADD-IN CARD POWER-UP SEQUENCING ·。垂 …79 5.2. 225 AND 300 W ADD-IN CARD POWER-UP SEQUENCING 6. CARD CONNECTOR SPECIFICATION. 6.1. CONNECTOR PINOUT 86 6.2. CONNECTOR INTERFACE DEFINITIONS 89 6.3. SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES 94 6.3./. Signal Integrity Req 94 6.3.2. Signal Integrity Requirements and Test Procedures for 2.5 GT/S Support.....94 6.3.3. Signal Inlegrily Requiremenls and Test Procedures for 5.0 GT/s Support.....97 6.3.3.1 Test Fixture Requirements……… 99 6.3.4. Signal Integrity Requirements and Test Procedures for 8.0 GT/s Support l00 6.3.4./ Test Fixture Requirements 101 6. 4. CONNECTOR ENVIRONMENTAL AND OTHER REQUIREMENTS 101 6. 4./. Environmental Requirements 01 6.4.2. Mechanical requirements …1703 6. 4.3. Current Ruling Requirement 104 6.4.4. Additional considerations 04 7. PCI EXPRESS 2X3 AUXILIARY POWER CONNECTOR DEFINITION.... 106 7. 1. 6-POSITION POWER CONNECTOR SYSTEM PERFORMANCE REQUIREMENTS.106 7. 2. 6-POSITION PCB HEADER ···· ∴106 7.2.1. 6-Position R/A Thru-llole PcB Leader Assembly .106 7.2.2. 6-Position R/A Thru-Hole Header recommended PCB Footprint 08 7.2.3. 6-Position R/A SMT PCB Header Assembly 109 7.2.4. R/A SMT Header recommended PCB Footprint 110 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 73. 6-POSITION CABLE ASSEMBLY 11 7. 4. CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE).112 7. 5. 6-POSITION POWER CONNECTOR SYSTEM PIN ASSIGNMENT .................................113 76. ADDITIONAL CONSIDERATIONS 音面面 114 8. PCI EXPRESS 2X4 AUXILIARY POWER CONNECTOR DEFINITION..115 8.1.2X4 AUXILIARY POWER CONNECTOR PERFORMANCE REQUIREMENTS………118 8. 2. 2X4 RECEPTACLE 118 8.2.1. Connector Drawing 118 8.2.2,. PCB Foolprin.......120 8. 3. CABLE ASSEMBLY ········+····················“· 121 8.4. CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE).123 8. 5. 2X4 AUXILIARY POWER CONNECTOR SYSTEM PIN ASSIGNMENT .124 8.6. ADDITIONAL CONSIDERATIONS 126 9. ADD-IN CARD FORM FACTORS AND IMPLEMENTATION ..s..127 9.1. ADD-IN CARD FORM FACTORS …127 9.2. CONNECTOR AND ADD-IN CARD LOCATIONS......................146 93. CARD INTEROPERABILITY +++++· 155 9. 4. I50W-ATX THERMAL MANAGEMENT 156 10. PCI EXPRESS 225 W/300W ADD-IN CARD THERMAL AND ACOUSTIC MANAGEMIENT ●D鲁看●·b●●e●e自。e 157 10.1. INLET TEMPERATURE ·垂垂 157 102. CARD THERMAL CHARACTERIZATION PROCEDURE 158 103. ACOUSTIC MANAGEMENT 162 10.3./. Background and Scope 62 103.2. Card Acoustic Characterization procedure 162 10.33. Acoustic recommendations and Guidelines.......................163 A. INSERTION LOSS VALUES (VOLTAGE TRANSFER FUNCTION) (INFORMATIONAL ONLY).O .. B. 8.0 GT/ 11. ACKNOWLEDGEMENTS 168 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 Figures FIGURE 2-2: EXAMPLE CURRENT MODE REFERENCE CLOCK SOURCE TERMINATION 23 FIGURE 2-3 SINGLE-ENDED MEASUREMENT POINTS FOR ABSOLUTE CROSS POINT AND SWING .25 FIGURE 2-4: SINGLE-ENDED MEASUREMENT POINTS FOR DELTA CROSS POINT 26 FIGURE 2-5 SINGLE-ENDED MEASUREMENT POINTS FOR RISE AND FALL TIME MATCHINO… 26 FIGURE 2-6: DIFFERENTIAL MEASUREMENT POINTS FOR DUTY CYCLE AND PERIOD 26 FIGURE 2-7: DIFFERENTIAL MEASUREMENT POINTS FOR RISE AND FALL TIME 27 FIGuRE 2-8: DIFFERENTIAL MEASUREMENT POINTS FOR RINGBACK..........27 FIGURE 2-9: REFERENCE CLOCK SYSTEM MEASUREMENT POINT AND LOADING ......27 FIGURE2-10: POWER UP.…..…………30 FIGURE 2-11: POWER MANAGEMENT STATES .31 FIGURE 2-12: OUT-OF-TOLERANCE THRESHOLD WINDOWS...............32 FIGuRE 2-13: POWER DOWN 33 FIGURE 2-14: WAKE# RISE AND FALL TIME MEASUREMENT POINTS. ..............................40 FIgure3-1: PRESENCE DETECT IN A HOT-PLUG ENVIRONMENT 42 FIGURE 4-1: PCI EXPRESS ON THE SY STEM BOARD 48 FIGURE 4-2: PCI EXPRESS CONNECTOR ON SYSTEM BOARD WITH AN ADD-IN CARD. 48 FIGURE 4-3: PCI EXPRESS CONNECTOR ON A RISER CARD WITH AN ADD-IN CARD.49 FIGURE4-4:LⅣ NK DEFINITION FOR TWO COMPONENTS..…..…………50 FIGURE 4-5: JITTER BUDGET FIGURE 4-6: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE DIAGRAM FIGURE 4-7: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE DIAGRAM 9 FIGURE 4-8: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR ADD-IN CARD RECEIVER PATH COMPLIANCE .61 FIGURE 4-9: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR ADD-IN CARD RECEIVER PATH COMPLIANCE 62 FIGURE 4-10: SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DIAGRAM 65 FIGURE 4-11: TWO PORT MEASUREMENT FUNCTIONAL BLOCK DIAGRAM......66 FIGURE 4-12. SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DⅠ AGRAM 68 FIGURE 4-13: TWO PORT MEASUREMENT FUNCTIONAL BLOCK DIAGRAM FIGURE 4-14: SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DIAGRAM 71 FIGURE 4-15: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR SYSTEM BOARD RECEIVER PATH COMPLIANCE 74 FIGURE 5-1: PCI EXPRESS 1SOW-ATX POWER-UP SEQUENCE 79 FIGURE 6-1: CONNECTOR FORM FACTOR........................90 FIGURE 6-2: RECOMMENDED FOOTPRINT ...... 91 FIGURE 6-3: ADD-IN CARD EDGE-FINGER DIMENSIONS …······· 92 FIGURE 6-4: ILLUSTRATION OF ADJACENT PAIRS ……97 FIGURE 6-5: CONTACT RESISTANCE MEASUREMENT POINTS 102 FIGURE 7-1: 6-POSITION R/A THRU-HOLE PCB HEADER 107 FIGURE 7-2:6-POSITION R/A THRU-HOLE HEADER RECOMMENDED PCB FOOTPRINT 108 FIGURE 7-3: R/A SMT PCB HEADER. ............................................................................109 FIGURE 7-4: SMT HEADER RECOMMENDED PCB FOOTPRINT 110 FIGURE 7-5: CABLE CONNECTOR HOUSING ……………111 6 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 FIGURE 7-6: CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE). .12 FIGURE 7-7: 150W-ATX POWER CONNECTOR 13 figure 8-1:2X 4 PLUG MATING WITHA2X4 RECEPTACLE 15 FIGuRE 8-2: 2X 3 PLUG MATING Witha 2X4 RECEPTACLE...............116 FIguRE 8-3: 2X 4 PLUG IS PHYSICALLY PREVENTED FROM MATING WITHA2X3 RECEPTACLE .117 FIGuRE 8-4: 2X4R/A THROUGH-HOLE RECEPTACLE DRAWING.........119 FIGURE 8-5: 2X4R/A THROUGH-HOLE RECPTACLE RECOMMENDED PCB FOOtPrint120 FIGuRE 8-6: CABLE PLUG CONNECTOR HOUSING ..............................................................121 FIGURE 8-7: MODULAR PLUG CONNECTOR HOUSING (ALL DIMENSIONS IN MM INCHES」)… l22 FIGURE 8-8: CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE)…,,,…,…,…,…,…………………………123 FIGURE 8-9: 2X4 AUXILIARY POWER CONNECTOR PLUG SIDE PIN-OUT ······· …124 FIGURE 8-10: 2X4 AUXILIARY POWER CONNECTOR RECEPTACLE SIDE PIN-OUT. 124 FIGURE8-11:23 AUXILⅠ ARY POWER CONNECTOR PIN-OUT.……………125 FIGurE 9-1: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITHOUT THE V/O BRACKET…………………128 FIGURE 9-2: CHASSIS INTERFACE ZONES ON RIGHT/ EAST EDGE OF ADD-IN CARD . 129 FIGURE 9-3: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITH THE IO BRACKET AND CARD RETAINER 130 FIgurE 9-4: ADDITIONAL FEATURE AND KEEPOUTS FOR A HIGH MASS CARD 132 Figure 9-5: STANDARD ADD-IN CARD I/O BRACKET 134 FIGURE 9-6 LOW PROFILE PCI EXPRESS ADD-IN CARD WITHOUT THE 10 BRACKET136 FIGurE 9-7: CHASSIS INTERFACE ZONE ON RIGHT EAST EDGE OF LOW PROFILE ADD IN CARD.…… 137 Figure 9-8: LOW PROFILE PCI EXPRESS ADD-IN CARD WITH THE IO BRACKET..138 FIGURE99: LOW PROFILE JO BRACKET……1139 FIGURE 9-10: FULL HEIGHT IO BRACKET FOR LOW PROFILE CARDS 140 FIGurE 9-11: PCI EXPRESS DUAL-SLOT ADD-IN CARD DIMENSIONAL DRAWING..141 FiGurE 9-12: PCI EXPRESS TRIPLE-SLOT ADD-IN CARD DIMENSIONAL DRAWING. 142 FIGurE 9-13: DETAILED TWO-SLOT I/O BRACKET DESIGN................143 FIGURE 9-14: TWO-SLOT IO BRACKET EXAMPLE (ISOMETRIC VIEW) 143 FIGURE9-15: DETAILED THREE- SLOT IO BRACKET DESIGN.………144 FIGURE 9-16: THREE-SLOT IO BRACKET EXAMPLE (ISOMETRIC VIEW 145 FIGuRE 9-17. EXAMPLE OF A PC SYSTEM IN MICROATX FORM FACTOR 146 Figure 9-18: INTRODUCTION OF A PCI EXPRESS CONNECTOR IN A MICROATX SYSTEM …147 FIgurE 9-19: MORE PCI EXPRESS CONNECTORS ARE INTRODUCED ON A MICROATX SYSTEM BOARD 148 FIGURE 9-20: PCI EXPRESS CONNECTOR LOCATION IN A MICROATX SYSTEM WITH ONE PCIEXPRESS CONNECTOR...............149 FIGURE 9-21: PCI EXPRESS CONNECTOR LOCATION IN A MICROATX SYSTEM WITH TWO PCI EXPRESS CONNECTORS 150 FIGurE 9-22: STANDARD HEIGHT CONNECTOR OPENING IN CHASSIS.......151 FiGure 9-23: LOW PROFILE CONNECTOR OPENING IN CHASSIS 152 FIGuRE 9-24: CHASSIS IO CABLE KEEPOUT 153 FIGURE 9-25: IMPACT OF STRUCTURAL SHAPES IN THE SYSTEM 154 FIGuRE 9-26: CARD ASSEMBLED IN CONNECTOR 155 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 FIGURE 10-1: EXAMPLE OF HIGH-POWER CARD SHOWING TEMPERATURE SENSOR PLACEMENTS AT THE THERMAL SOLUTION INLET 157 FIGURE 10-2: THERMAL CHARACTERIZATION FIXTURE DUAL-SLOT VERSION... 159 FIGURE 10-3: THERMAL CHARACTERIZATION FIXTURE- TRIPLE-SLOT VERSION.160 FIGURE 10-4: THERMAL CHARACTERIZATION FIXTURE- TANDEM DUAL-SLOT VERSION 161 FIGURE A-l: EXAMPLE INTERCONNECT TERMINATED AT THE CONNECTOR INTERFACE………… 164 FIGURE A-2: INSERTION LOSS BUDGETS 165 8 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 Tables TABLE 1-1: POWER SUPPLY RAIL REOUTREMENTS 20 TABLE 2-1: REFCLK DC SPECIFICATIONS AND AC TIMING REQUIREMENTS 24 TABLE 2-2: MAXIMUM ALLOWED PHASE JITTER WHEN APPLIED TO FIXED FILTER CHARACTERISTIC ··· 29 TABLE 2-3: AUXILIARY SIGNAL DC SPECIFICATIONS-PERST# WAKE# AND SMBUS.. 39 TABLE 2-4: POWER SEQUENCING AND RESET SIGNAL TIMINGS 40 TABLE 4-1: POWER SUPPLY RAIL REQUIREMENTS ·.·“···.··.······ 44 TABLE 4-2. TOTAL SYSTEM JITTER BUDGET FOR 2,5GT/S SIGNALING . ....................52 TABLE 4-3: ALLOCATION OF INTERCONNECT JITTER BUDGET FOR 2.5 GT/S SIGNALING. 52 TABLE 4-4: TOTAL SYSTEM JITTER BUDGET FOR 5.0 GT/S SIGNALING TABLE 4-5: ALLOWABLE INTERCONNECT LANE-TO-LANE SKEW 4 TABLE 4-6: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS at25 GT/S 56 TABLE 4-7: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS At 50 GT/S AND 3. 5 DB DE-EMPHASIS 57 TABLE 4-8: ADD-IN CARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING at3.5 DB DE-EMPHASIS 58 TABLE 4-9: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 5.0 GT/S AT 6.0 DB DE-EMPHASIS ·;垂 ∴58 TABLE 4-10: ADD-IN CARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING AT 6.0 DB DE-EMPHASIS TABLE 4-11: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS at8OGT/S TABLE 4-12: ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT2.5GT/S 垂·· 60 TABLE 4-13: ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT50GT/S 61 TABLE 4-14: LONG CHANNEL ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 8.0 GT/S 63 TABLE 4-15: SHORT CHANNEL ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 8.0GT/S 64 TABLE 4-16: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT2.5GT/S ·· 65 TABLE 4-17: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 50GT/S ····· ∴68 TABLE 4-18: SYSTEM BOARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING 69 TABLE 4-19: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT8.0 GT/S WITH IDEAL ADAPTIVE TX EQUALIZATION 71 TABLE 4-20: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 2.5GT/S ·:·+············+·············;············ TABLE 4-21: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 5.0 GT/S FOR A LINK THAT OPERATES WITH 3.5 DB DE-EMPHASIS. ............73 TABLE 4-22: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 5.GT/S FOR A LINK THAT OPERATES WITH 6.0 DB DE-EMPHASIS 74 TABLE 4-23: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT8.0GT/S.…………… 76 PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV.3.0 TABLE 5-1: PCI EXPRESS 300 W CARD WITH ONE 2X 4 AND ONE 2X 3 CONNECTOR) PERMITTED INITIAL POWER DRAW TABLE 5-2: PCI EXPRESS 300W CARD (WITH THREE 2X 3 CONNECTORS) PERMITTED INITIAL POWER DRAW 82 TABLE 5-3: PCI EXPRESS 225 W CARD WITH ONE 2X 4 CONNECTOR) PERMITTED INITIAL POWER DRAW 83 TABLE 5-4: PCI EXPRESS 225 W CARD ( WITH TWO2X3 CONNECTORS) PERMITTED TABLE 5-5: PCI EXPRESS 225 W CARD (WITH ONE 2 X 3 AND ONE 2 X 4 CONNECTOR).8% INITIAL POWER DRAW PERMITTED INITIAL POWER DRAW 84 TAbLE 6-1: PCI EXPRESS CONNECTORS PINOUT 86 TABLE 6-2: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 2.5/S SUPPORT ∴…95 TABLE 6-3: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 5.0 GT/S SUPPORT 垂··,·垂 TABLE 6-4: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 8.0 GT/S SUPPORT 100 TABLE 6-5: TEST DURATIONS .102 TABLE 6-6: MECHANICAL TEST PROCEDURES AND REQUIREMENTS 103 TABLE 6-7: END OF LIFE CURRENT RATING TEST SEQUENCE............104 TABLE68: ADDITIONAL REQUIREMENTS.….…,………,,……,,…… 104 TABLE 7-1: 150W-ATX POWER CONNECTOR PIN-OUT 113 TABLE 7-2: PCI EXPRESS 15OW-ATX POWER CONNECTOR ADDITIONAL REQUIREMENTSI14 table 8-1: 2X4 AUXILIARY POWER CONNECTOR PIN-OUT ASSIGNMENT ,125 table 8-2: SENSE PINS DECODING BY A GRAPHICS card 125 table 8-3: 2X3 PLUg To 2X 4 RECEPTACLE PIN MAPPING 126 TABLE 8-4: ADDITIONAL REQUIREMENTS 126 TABLE9-1:ADD-Ⅰ N CARD SIZES∴ 127 TaBLE 9-2: CARD INTEROPERABILITY 155 TABLE A-1: ALLOCATION OF INTERCONNECT PATH INSERTION LOSS BUDGET FOR 2.5 GT/S SIGNALING 165 10 【实例截图】
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