实例介绍
【实例简介】
93000的使用Manual！方便快捷，掌握高端测试设备使用方法及技巧。测试工程师的设备入门手册。
Contents User Training Part 1 1 Contents Training Overview 17 Study Materials 18 Audience Curriculum 20 Basic Training Classes 20 Advanced or Product Specific Training Classes 20 Other classes available 20 Requirements for Part 1 Training 22 Training Objectives 23 Creating a test program Create Tests Execute the test programs 24 Evaluate the results 25 Application of Test Programs 26 Agenda Uesd Wednesday 28 29 Frida 29 Documentation m 30 On the tester Additional Support Resources STS Internal Web Page… External Web Page e-mail support 32 User Training Part 1 Test Engineer's Responsibilities 33 In this lesson 34 Test Engineer's Responsibilities 35 Overview 36 Test Development Flowchart 38 Creating a Test Pla Device Information Shift/Storage Register 74ACT299 Required Tests for the 74AC T299 44 Designing the DUT Board Basic Process General Rules for dut board design 53 Multi-site Design Considerations Hardware overview 63 In this lesson Major Components of the Tester Digital and Analog Components Test head Support ri 68 Manipulator Cooling Unit Power Supply Switch and Indicator Unit LINUX WOrkstation Synchronization of Resources 76 Card Cage 77 Card Cage Layout…… Board placement 80 DUT Interfaces I00II000 83 DUT Board layout 84 Pogo block Allocation 85 Pogo Block Numbering… Differential channels Tester Channel Mapping Cardcage components Channel boards 97 Clock board 114 User Training Part 1 DPS Power Supply DC/DC(Converter) Boards 133 Utility Lines.………,… 134 Software Overview 137 SmarTest Test Development Typical Test Scenarios Main Components of smarTest Equation-Based Setup 142 Online documentation Full Text search Instructions Running the Software 146 Selected files and directories structure 147 Start Smar Test 149 Start-Up Screen 151 How to shut down smartest 152 How to use kill smarTest 152 SmarTest software structure 153 Verigy SmarTest Main Toolbar 154 The data manager… Data Manager menus 165 Setup Page Result Page 168 Program Page Setup File Access 171 Set Concept 173 Testflow edito 174 Inside the software Firmware commands.… 179 Error Messages 179 Offline Mode 180 Review test 181 Calibration 183 In this lesson 184 User Training Part 1 Calibration Concepts 185 System Calibrati 187 Auto calibration Traceable Calibration (NIST) 191 DC Calibration 192 AC Calibration DPS Calibratio 194 Fixture Delay Measurement (TDR) How the tdR measurement is performed 196 Verigy E8006A calibration robot Docking the Calibration robot to the Test Head System Diagnostic 202 Review test 204 Main Test Setup Components 205 In this lesson 206 Basic Test elements 207 Device director 210 Creating a Device Directory with Default Settings Structure of the Device Directory 212 Defining Device Technology 213 The model file 214 General Description 214 Licensing……… 215 FLEXIm license options 215 Licenses for pin Scale cards Additional information 216 Default Values for Device Directory .216 Creating a Device Directory with User Setting 216 Defining the Pins 221 In this lesson 1,重 222 Pin Configuration 223 ConteXts 223 Pin Specification 223 User Training Part 1 Pin Configuration Download 225 Defining the pin configuration DPS Performance Ranges 237 Specification of the dPS Performance Range 238 Defining Pin Groups… ……239 Atomar-Based Pin group Definition 239 Expression-Based Pin Group Definitions 242 Defining Pins for a Multisite Setup Overview 245 Define pins Pin Configuration for Quad site dUt board 248 Generating a Pin Config from an ASCll File 250 Review tes Defining the Levels 253 In this lesson 254 AC Levels 255 74ACT299 Levels 255 Level definitions 255 Input and output pin resources 256 Clam Drive levels 260 Compare Levels(Thresholds) 264 Active Load 267 DPS(Device Power Supply) Pins 269 Disconnect State DPS: Power Up and power down 272 Overview of the Level Setup 274 Benefits of Using Level Specs….…,…, Structure of Level Setup Information ………276 How many Level Sets Do you need? 281 Level Setup Stel 282 Overview 282 Fixed Level Setup 282 Equation Based Level Setup Creating equation Based Test sets 285 Creating Level Spec Sets 289 User Training Part 1 3. Level verification 292 Editing equation Based Level values 294 Using Formats 295 Converting Levels 297 Creating EBT Setups from Fixed Level Sets for the DPs .297 Creating Level Sets 299 Review test 302 Timing Setup 303 In this lesson .304 74ACT299 Timing… 305 V93000 Timing Resources 309 The physical Waveform Table Edges 312 V93000 Timing Approach Equation Based Timing Setup ::::.::::E.::: ATE Definitions and Equation Based Timing 316 Physical Waveform Equation-Based Timing(EBT)Setup 317 Step #1: Create a Wavetable Step #2 Create an equation Set Step #3 Creating a Specification Step #4: verify the timing Setup 346 Logical Waveform EBT Concept of Logical Waveforms Data parameters Creating a logical Wavetable 356 Representing Vectors by Logical Device Cycles .359 Fixed Timing Other Timing Topics Edit Device Window 369 Waveforms and device cycles 369 Ⅹ Modes Review tes 375 Vector and Pattern Management 377 In this lesson 8 User Training Part 1 SmarTest workcenter 380 Vector setu .383 ∨ ector files∴ Basic test scenario 386 Customizing Display Formats Vector verification Pattern Management 406 Vector generation Vector Memory Organization Standard Test Functions 437 In this lesson 438 Standard Test Function Groups DC Tests 439 AC Tests 441 443 other Tests …44 Test control 445 Sequencer Control 446 Mixed Signal Tests 447 The Test control window 449 ng the brea k feature 450 The Continuity Test Function 重1重重 Debugging a continuity test Pin PMU and High Precision PMU 452 Continuity Test Using the PM 455 Continuity Test Using Programmable Load Setting up a continuity test( overview)…… Functional Test 462 Executing a functional test 463 Review test 465 Putting It All Together 467 Introducing the Testflow Edito,.…......… From test plan to testflo Testflow Structure Setup Information… 471 User Training Part 1 Assigning the Global Setup Files 474 Downloading Setup Files 475 Editing setup files Test Program Flow elements 477 Inserting Testsuites 479 Testmethods and Userprocedures 481 Inserting bins 489 Editing Testsuite Setup Elements Setting Testsuite Flags Site control Testflow Flags…, 501 Saving the Testilow in the Device Directory 505 Executing the Testflow UI Report Window…. 508 Executing an Individual Testsuite 509 How to execute parts of the testflow Updating Primary Sets Loading a testflow Creating a new Testflow… Downloading Setup Files Editing setup Files 513 Saving setup files Review te Test Result Analysis 517 In this lesson Debugging a dc test.… 519 Debugging a Continuity Test 519 Debugging an Operating Current Test 520 Debugging a Standby Current Test 521 Debugging a Functional Test Gross Functional Test 522 AC Functional Test 523 Using Result Tools 524 dentifying Failed Pins and Test Cycles(Error Map The error Maps User Training Part 1 【实例截图】
【核心代码】
93000的使用Manual！方便快捷，掌握高端测试设备使用方法及技巧。测试工程师的设备入门手册。
Contents User Training Part 1 1 Contents Training Overview 17 Study Materials 18 Audience Curriculum 20 Basic Training Classes 20 Advanced or Product Specific Training Classes 20 Other classes available 20 Requirements for Part 1 Training 22 Training Objectives 23 Creating a test program Create Tests Execute the test programs 24 Evaluate the results 25 Application of Test Programs 26 Agenda Uesd Wednesday 28 29 Frida 29 Documentation m 30 On the tester Additional Support Resources STS Internal Web Page… External Web Page e-mail support 32 User Training Part 1 Test Engineer's Responsibilities 33 In this lesson 34 Test Engineer's Responsibilities 35 Overview 36 Test Development Flowchart 38 Creating a Test Pla Device Information Shift/Storage Register 74ACT299 Required Tests for the 74AC T299 44 Designing the DUT Board Basic Process General Rules for dut board design 53 Multi-site Design Considerations Hardware overview 63 In this lesson Major Components of the Tester Digital and Analog Components Test head Support ri 68 Manipulator Cooling Unit Power Supply Switch and Indicator Unit LINUX WOrkstation Synchronization of Resources 76 Card Cage 77 Card Cage Layout…… Board placement 80 DUT Interfaces I00II000 83 DUT Board layout 84 Pogo block Allocation 85 Pogo Block Numbering… Differential channels Tester Channel Mapping Cardcage components Channel boards 97 Clock board 114 User Training Part 1 DPS Power Supply DC/DC(Converter) Boards 133 Utility Lines.………,… 134 Software Overview 137 SmarTest Test Development Typical Test Scenarios Main Components of smarTest Equation-Based Setup 142 Online documentation Full Text search Instructions Running the Software 146 Selected files and directories structure 147 Start Smar Test 149 Start-Up Screen 151 How to shut down smartest 152 How to use kill smarTest 152 SmarTest software structure 153 Verigy SmarTest Main Toolbar 154 The data manager… Data Manager menus 165 Setup Page Result Page 168 Program Page Setup File Access 171 Set Concept 173 Testflow edito 174 Inside the software Firmware commands.… 179 Error Messages 179 Offline Mode 180 Review test 181 Calibration 183 In this lesson 184 User Training Part 1 Calibration Concepts 185 System Calibrati 187 Auto calibration Traceable Calibration (NIST) 191 DC Calibration 192 AC Calibration DPS Calibratio 194 Fixture Delay Measurement (TDR) How the tdR measurement is performed 196 Verigy E8006A calibration robot Docking the Calibration robot to the Test Head System Diagnostic 202 Review test 204 Main Test Setup Components 205 In this lesson 206 Basic Test elements 207 Device director 210 Creating a Device Directory with Default Settings Structure of the Device Directory 212 Defining Device Technology 213 The model file 214 General Description 214 Licensing……… 215 FLEXIm license options 215 Licenses for pin Scale cards Additional information 216 Default Values for Device Directory .216 Creating a Device Directory with User Setting 216 Defining the Pins 221 In this lesson 1,重 222 Pin Configuration 223 ConteXts 223 Pin Specification 223 User Training Part 1 Pin Configuration Download 225 Defining the pin configuration DPS Performance Ranges 237 Specification of the dPS Performance Range 238 Defining Pin Groups… ……239 Atomar-Based Pin group Definition 239 Expression-Based Pin Group Definitions 242 Defining Pins for a Multisite Setup Overview 245 Define pins Pin Configuration for Quad site dUt board 248 Generating a Pin Config from an ASCll File 250 Review tes Defining the Levels 253 In this lesson 254 AC Levels 255 74ACT299 Levels 255 Level definitions 255 Input and output pin resources 256 Clam Drive levels 260 Compare Levels(Thresholds) 264 Active Load 267 DPS(Device Power Supply) Pins 269 Disconnect State DPS: Power Up and power down 272 Overview of the Level Setup 274 Benefits of Using Level Specs….…,…, Structure of Level Setup Information ………276 How many Level Sets Do you need? 281 Level Setup Stel 282 Overview 282 Fixed Level Setup 282 Equation Based Level Setup Creating equation Based Test sets 285 Creating Level Spec Sets 289 User Training Part 1 3. Level verification 292 Editing equation Based Level values 294 Using Formats 295 Converting Levels 297 Creating EBT Setups from Fixed Level Sets for the DPs .297 Creating Level Sets 299 Review test 302 Timing Setup 303 In this lesson .304 74ACT299 Timing… 305 V93000 Timing Resources 309 The physical Waveform Table Edges 312 V93000 Timing Approach Equation Based Timing Setup ::::.::::E.::: ATE Definitions and Equation Based Timing 316 Physical Waveform Equation-Based Timing(EBT)Setup 317 Step #1: Create a Wavetable Step #2 Create an equation Set Step #3 Creating a Specification Step #4: verify the timing Setup 346 Logical Waveform EBT Concept of Logical Waveforms Data parameters Creating a logical Wavetable 356 Representing Vectors by Logical Device Cycles .359 Fixed Timing Other Timing Topics Edit Device Window 369 Waveforms and device cycles 369 Ⅹ Modes Review tes 375 Vector and Pattern Management 377 In this lesson 8 User Training Part 1 SmarTest workcenter 380 Vector setu .383 ∨ ector files∴ Basic test scenario 386 Customizing Display Formats Vector verification Pattern Management 406 Vector generation Vector Memory Organization Standard Test Functions 437 In this lesson 438 Standard Test Function Groups DC Tests 439 AC Tests 441 443 other Tests …44 Test control 445 Sequencer Control 446 Mixed Signal Tests 447 The Test control window 449 ng the brea k feature 450 The Continuity Test Function 重1重重 Debugging a continuity test Pin PMU and High Precision PMU 452 Continuity Test Using the PM 455 Continuity Test Using Programmable Load Setting up a continuity test( overview)…… Functional Test 462 Executing a functional test 463 Review test 465 Putting It All Together 467 Introducing the Testflow Edito,.…......… From test plan to testflo Testflow Structure Setup Information… 471 User Training Part 1 Assigning the Global Setup Files 474 Downloading Setup Files 475 Editing setup files Test Program Flow elements 477 Inserting Testsuites 479 Testmethods and Userprocedures 481 Inserting bins 489 Editing Testsuite Setup Elements Setting Testsuite Flags Site control Testflow Flags…, 501 Saving the Testilow in the Device Directory 505 Executing the Testflow UI Report Window…. 508 Executing an Individual Testsuite 509 How to execute parts of the testflow Updating Primary Sets Loading a testflow Creating a new Testflow… Downloading Setup Files Editing setup Files 513 Saving setup files Review te Test Result Analysis 517 In this lesson Debugging a dc test.… 519 Debugging a Continuity Test 519 Debugging an Operating Current Test 520 Debugging a Standby Current Test 521 Debugging a Functional Test Gross Functional Test 522 AC Functional Test 523 Using Result Tools 524 dentifying Failed Pins and Test Cycles(Error Map The error Maps User Training Part 1 【实例截图】
【核心代码】
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