实例介绍
【实例简介】CPU/GPU design
【实例截图】
【核心代码】
Contents 1. Cover Page 2. Title Page 3. Copyright Page 4. Dedication Page 5. Contents 6. Preface 7. CHAPTER 1 Introduction 1. 1.1 Overview 2. 1.2 Computer Systems 1. 1.2.1 The Main Components of a Computer 2. 1.2.2 System Components 3. 1.2.3 Classification of Computing Devices 3. 1.3 An Example System: Wading Through the Jargon 4. 1.4 Standards Organizations 5. 1.5 Historical Development 1. 1.5.1 Generation Zero: Mechanical Calculating Machines (1642–1945) 2. 1.5.2 The First Generation: Vacuum Tube Computers (1945– 1953) 3. 1.5.3 The Second Generation: Transistorized Computers (1954– 1965) 4. 1.5.4 The Third Generation: Integrated Circuit Computers (1965–1980) 5. 1.5.5 The Fourth Generation: VLSI Computers (1980–????) 6. 1.5.6 Moore’s Law 6. 1.6 The Computer Level Hierarchy 7. 1.7 Cloud Computing: Computing as a Service 8. 1.8 The Fragility of the Internet 9. 1.9 The Von Neumann Model 10. 1.10 Non-Von Neumann Models 11. 1.11 Parallel Processors and Parallel Computing 12. Chapter Summary 13. Further Reading 14. References 15. Review of Essential Terms and Concepts 16. Exercises 8. CHAPTER 2 Data Representation in Computer Systems 1. 2.1 Introduction 2. 2.2 Positional Numbering Systems 3. 2.3 Converting Between Bases 1. 2.3.1 Converting Unsigned Whole Numbers 2. 2.3.2 Converting Fractions 3. 2.3.3 Converting Between Power-of-Two Radices 4. 2.4 Signed Integer Representation 1. 2.4.1 Signed Magnitude 2. 2.4.2 Complement Systems 3. 2.4.3 Excess-M Representation for Signed Numbers 4. 2.4.4 Unsigned Versus Signed Numbers 5. 2.4.5 Computers, Arithmetic, and Booth’s Algorithm 6. 2.4.6 Carry Versus Overflow 7. 2.4.7 Binary Multiplication and Division Using Shifting 5. 2.5 Floating-Point Representation 1. 2.5.1 A Simple Model 2. 2.5.2 Floating-Point Arithmetic 3. 2.5.3 Floating-Point Errors 4. 2.5.4 The IEEE-754 Floating-Point Standard 5. 2.5.5 Range, Precision, and Accuracy 6. 2.5.6 Additional Problems with Floating-Point Numbers 6. 2.6 Character Codes 1. 2.6.1 Binary-Coded Decimal 2. 2.6.2 EBCDIC 3. 2.6.3 ASCII 4. 2.6.4 Unicode 7. 2.7 Error Detection and Correction 1. 2.7.1 Cyclic Redundancy Check 2. 2.7.2 Hamming Codes 3. 2.7.3 Reed-Solomon 8. Chapter Summary 9. Further Reading 10. References 11. Review of Essential Terms and Concepts 12. Exercises 9. CHAPTER 3 Boolean Algebra and Digital Logic 1. 3.1 Introduction 2. 3.2 Boolean Algebra 1. 3.2.1 Boolean Expressions 2. 3.2.2 Boolean Identities 3. 3.2.3 Simplification of Boolean Expressions 4. 3.2.4 Complements 5. 3.2.5 Representing Boolean Functions 3. 3.3 Logic Gates 1. 3.3.1 Symbols for Logic Gates 2. 3.3.2 Universal Gates 3. 3.3.3 Multiple Input Gates 4. 3.4 Karnaugh Maps 1. 3.4.1 Introduction 2. 3.4.2 Description of Kmaps and Terminology 3. 3.4.3 Kmap Simplification for Two Variables 4. 3.4.4 Kmap Simplification for Three Variables 5. 3.4.5 Kmap Simplification for Four Variables 6. 3.4.6 Don’t Care Conditions 7. 3.4.7 Summary 5. 3.5 Digital Components 1. 3.5.1 Digital Circuits and Their Relationship to Boolean Algebra 2. 3.5.2 Integrated Circuits 3. 3.5.3 Putting It All Together: From Problem Description to Circuit 6. 3.6 Combinational Circuits 1. 3.6.1 Basic Concepts 2. 3.6.2 Examples of Typical Combinational Circuits 7. 3.7 Sequential Circuits 1. 3.7.1 Basic Concepts 2. 3.7.2 Clocks 3. 3.7.3 Flip-Flops 4. 3.7.4 Finite-State Machines 5. 3.7.5 Examples of Sequential Circuits 6. 3.7.6 An Application of Sequential Logic: Convolutional Coding and Viterbi Detection 8. 3.8 Designing Circuits 9. Chapter Summary 10. Further Reading 11. References 12. Review of Essential Terms and Concepts 13. Exercises 10. CHAPTER 4 MARIE: An Introduction to a Simple Computer 1. 4.1 Introduction 2. 4.2 CPU Basics and Organization 1. 4.2.1 The Registers 2. 4.2.2 The ALU 3. 4.2.3 The Control Unit 3. 4.3 The Bus 4. 4.4 Clocks 5. 4.5 The Input/Output Subsystem 6. 4.6 Memory Organization and Addressing 7. 4.7 Interrupts 8. 4.8 MARIE 1. 4.8.1 The Architecture 2. 4.8.2 Registers and Buses 3. 4.8.3 Instruction Set Architecture 4. 4.8.4 Register Transfer Notation 9. 4.9 Instruction Processing 1. 4.9.1 The Fetch–Decode–Execute Cycle 2. 4.9.2 Interrupts and the Instruction Cycle 3. 4.9.3 MARIE’s I/O 10. 4.10 A Simple Program 11. 4.11 A Discussion on Assemblers 1. 4.11.1 What Do Assemblers Do? 2. 4.11.2 Why Use Assembly Language? 12. 4.12 Extending Our Instruction Set 13. 4.13 A Discussion on Decoding: Hardwired Versus Microprogrammed Control 1. 4.13.1 Machine Control 2. 4.13.2 Hardwired Control 3. 4.13.3 Microprogrammed Control 14. 4.14 Real-World Examples of Computer Architectures 1. 4.14.1 Intel Architectures 2. 4.14.2 MIPS Architectures 15. Chapter Summary 16. Further Reading 17. References 18. Review of Essential Terms and Concepts 19. Exercises 20. True or False 11. CHAPTER 5 A Closer Look at Instruction Set Architectures 1. 5.1 Introduction 2. 5.2 Instruction Formats 1. 5.2.1 Design Decisions for Instruction Sets 2. 5.2.2 Little Versus Big Endian 3. 5.2.3 Internal Storage in the CPU: Stacks Versus Registers 4. 5.2.4 Number of Operands and Instruction Length 5. 5.2.5 Expanding Opcodes 3. 5.3 Instruction Types 1. 5.3.1 Data Movement 2. 5.3.2 Arithmetic Operations 3. 5.3.3 Boolean Logic Instructions 4. 5.3.4 Bit Manipulation Instructions 5. 5.3.5 Input/Output Instructions 6. 5.3.6 Instructions for Transfer of Control 7. 5.3.7 Special-Purpose Instructions 8. 5.3.8 Instruction Set Orthogonality 4. 5.4 Addressing 1. 5.4.1 Data Types 2. 5.4.2 Address Modes 5. 5.5 Instruction Pipelining 6. 5.6 Real-World Examples of ISAs 1. 5.6.1 Intel 2. 5.6.2 MIPS 3. 5.6.3 Java Virtual Machine 4. 5.6.4 ARM 7. Chapter Summary 8. Further Reading 9. References 10. Review of Essential Terms and Concepts 11. Exercises 12. True or False 12. CHAPTER 6 Memory 1. 6.1 Introduction 2. 6.2 Types of Memory 3. 6.3 The Memory Hierarchy 1. 6.3.1 Locality of Reference 4. 6.4 Cache Memory 1. 6.4.1 Cache Mapping Schemes 2. 6.4.2 Replacement Policies 3. 6.4.3 Effective Access Time and Hit Ratio 4. 6.4.4 When Does Caching Break Down? 5. 6.4.5 Cache Write Policies 6. 6.4.6 Instruction and Data Caches 7. 6.4.7 Levels of Cache 5. 6.5 Virtual Memory 1. 6.5.1 Paging 2. 6.5.2 Effective Access Time Using Paging 3. 6.5.3 Putting It All Together: Using Cache, TLBs, and Paging 4. 6.5.4 Advantages and Disadvantages of Paging and Virtual Memory 5. 6.5.5 Segmentation 6. 6.5.6 Paging Combined with Segmentation 6. 6.6 Real -World Examples of Memory Management 7. Chapter Summary 8. Further Reading 9. References 10. Review of Essential Terms and Concepts 11. Exercises 13. CHAPTER 7 Input/Output Systems 1. 7.1 Introduction 2. 7.2 I/O and Performance 3. 7.3 Amdahl’s Law 4. 7.4 I/O Architectures 1. 7.4.1 I/O Control Methods 2. 7.4.2 Character I/O Versus Block I/O 3. 7.4.3 I/O Bus Operation 4. 7.4.4 I/O Buses and Interfaces 5. 7.5 Data Transmission Modes 1. 7.5.1 Parallel Data Transmission 2. 7.5.2 Serial Data Transmission 6. 7.6 Disk Technology 1. 7.6.1 Rigid Disk Drives 2. 7.6.2 Solid State Drives 7. 7.7 Optical Disks 1. 7.7.1 CD-ROM 2. 7.7.2 DVD 3. 7.7.3 Blue-Violet Laser Discs 4. 7.7.4 Optical Disk Recording Methods 8. 7.8 Magnetic Tape 1. 7.8.1 LTO: Linear Tape Open 9. 7.9 RAID 1. 7.9.1 RAID Level 0 2. 7.9.2 RAID Level 1 3. 7.9.3 RAID Level 2 4. 7.9.4 RAID Level 3 5. 7.9.5 RAID Level 4 6. 7.9.6 RAID Level 5 7. 7.9.7 RAID Level 6 8. 7.9.8 RAID DP 9. 7.9.9 Hybrid RAID Systems 10. 7.10 The Future of Data Storage 11. Chapter Summary 12. Further Reading 13. References 14. Review of Essential Terms and Concepts 15. Exercises 14. CHAPTER 8 System Software 1. 8.1 Introduction 2. 8.2 Operating Systems 1. 8.2.1 Operating Systems History 2. 8.2.2 Operating System Design 3. 8.2.3 Operating System Services 3. 8.3 Protected Environments 1. 8.3.1 Virtual Machines 2. 8.3.2 Subsystems and Partitions 3. 8.3.3 Protected Environments and the Evolution of Systems Architectures 4. 8.4 Programming Tools 1. 8.4.1 Assemblers and Assembly 2. 8.4.2 Link Editors 3. 8.4.3 Dynamic Link Libraries 4. 8.4.4 Compilers 5. 8.4.5 Interpreters 5. 8.5 Java: All of the Above 6. Chapter Summary 7. Further Reading 8. References 9. Review of Essential Terms and Concepts 10. Exercises 15. CHAPTER 9 Alternative Architectures 1. 9.1 Introduction 2. 9.2 RISC Machines 3. 9.3 Flynn’s Taxonomy 4. 9.4 Parallel and Multiprocessor Architectures 1. 9.4.1 Superscalar and VLIW 2. 9.4.2 Vector Processors 3. 9.4.3 Interconnection Networks 4. 9.4.4 Shared Memory Multiprocessors 5. 9.4.5 Distributed Computing 5. 9.5 Alternative Parallel Processing Approaches 1. 9.5.1 Dataflow Computing 2. 9.5.2 Neural Networks 3. 9.5.3 Systolic Arrays 6. 9.6 Quantum Computing 7. Chapter Summary 8. Further Reading 9. References 10. Review of Essential Terms and Concepts 11. Exercises 16. CHAPTER 10 Topics in Embedded Systems 1. 10.1 Introduction 2. 10.2 An Overview of Embedded Hardware 1. 10.2.1 Off-the-Shelf Embedded System Hardware 2. 10.2.2 Configurable Hardware 3. 10.2.3 Custom-Designed Embedded Hardware 3. 10.3 An Overview of Embedded Software 1. 10.3.1 Embedded Systems Memory Organization 2. 10.3.2 Embedded Operating Systems 3. 10.3.3 Embedded Systems Software Development 4. Chapter Summary 5. Further Reading 6. References 7. Review of Essential Terms and Concepts 8. Exercises 17. CHAPTER 11 Performance Measurement and Analysis 1. 11.1 Introduction 2. 11.2 Computer Performance Equations 3. 11.3 Mathematical Preliminaries 1. 11.3.1 What the Means Mean 2. 11.3.2 The Statistics and Semantics 4. 11.4 Benchmarking 1. 11.4.1 Clock Rate, MIPS, and FLOPS 2. 11.4.2 Synthetic Benchmarks: Whetstone, Linpack, and Dhrystone 3. 11.4.3 Standard Performance Evaluation Corporation Benchmarks 4. 11.4.4 Transaction Processing Performance Council Benchmarks 5. 11.4.5 System Simulation 5. 11.5 CPU Performance Optimization 1. 11.5.1 Branch Optimization 2. 11.5.2 Use of Good Algorithms and Simple Code 6. 11.6 Disk Performance 1. 11.6.1 Understanding the Problem 2. 11.6.2 Physical Considerations 3. 11.6.3 Logical Considerations 7. Chapter Summary 8. Further Reading 9. References 10. Review of Essential Terms and Concepts 11. Exercises 18. Glossary 19. Answers and Hints for Selected Exercises 20. Index Landmarks
Essentials of Computer Organization and Architecture 5th Edition.Pdf
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